Memory node is necessary for TH1520 SPL to configure size and base
address of DRAM. Let's preserve it in SPL devicetree blob.

Signed-off-by: Yao Zi <zi...@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycli...@andestech.com>
---
 arch/riscv/dts/th1520-lichee-module-4a.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/dts/th1520-lichee-module-4a.dtsi 
b/arch/riscv/dts/th1520-lichee-module-4a.dtsi
index 86a81bdcf77..20dbc4c7d24 100644
--- a/arch/riscv/dts/th1520-lichee-module-4a.dtsi
+++ b/arch/riscv/dts/th1520-lichee-module-4a.dtsi
@@ -14,6 +14,7 @@
        memory@0 {
                device_type = "memory";
                reg = <0x0 0x00000000 0x2 0x00000000>;
+               bootph-pre-ram;
        };
 };
 
-- 
2.49.0

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