Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+rene...@mailbox.org>
---
Cc: Christian Marangi <ansuels...@gmail.com>
Cc: Ilias Apalodimas <ilias.apalodi...@linaro.org>
Cc: Jerome Forissier <jerome.foriss...@linaro.org>
Cc: Jim Liu <jjl...@nuvoton.com>
Cc: Joe Hershberger <joe.hershber...@ni.com>
Cc: Mario Six <mario....@gdsys.cc>
Cc: Michal Simek <michal.si...@amd.com>
Cc: Nobuhiro Iwamatsu <iwama...@nigauri.org>
Cc: Paul Barker <paul.barker...@bp.renesas.com>
Cc: Ramon Fried <rfried....@gmail.com>
Cc: Simon Glass <s...@chromium.org>
Cc: Sughosh Ganu <sughosh.g...@linaro.org>
Cc: Tom Rini <tr...@konsulko.com>
Cc: u-boot@lists.denx.de
---
V2: No change
---
 board/gdsys/a38x/ihs_phys.c | 192 ++++++++++++++++++------------------
 1 file changed, 96 insertions(+), 96 deletions(-)

diff --git a/board/gdsys/a38x/ihs_phys.c b/board/gdsys/a38x/ihs_phys.c
index 690a29690b9..3370a4fa1a3 100644
--- a/board/gdsys/a38x/ihs_phys.c
+++ b/board/gdsys/a38x/ihs_phys.c
@@ -102,102 +102,6 @@ uint calculate_octo_phy_mask(void)
        return octo_phy_mask;
 }
 
-int register_miiphy_bus(uint k, struct mii_dev **bus)
-{
-       int retval;
-       struct mii_dev *mdiodev = mdio_alloc();
-       char *name = bb_miiphy_buses[k].name;
-
-       if (!mdiodev)
-               return -ENOMEM;
-       strlcpy(mdiodev->name, name, MDIO_NAME_LEN);
-       mdiodev->read = bb_miiphy_read;
-       mdiodev->write = bb_miiphy_write;
-
-       retval = mdio_register(mdiodev);
-       if (retval < 0)
-               return retval;
-       *bus = miiphy_get_dev_by_name(name);
-
-       return 0;
-}
-
-struct porttype *get_porttype(uint octo_phy_mask, uint k)
-{
-       uint octo_index = k * 4;
-
-       if (!k) {
-               if (octo_phy_mask & 0x01)
-                       return &porttypes[PORTTYPE_MAIN_CAT];
-               else if (!(octo_phy_mask & 0x03))
-                       return &porttypes[PORTTYPE_16C_16F];
-       } else {
-               if (octo_phy_mask & (1 << octo_index))
-                       return &porttypes[PORTTYPE_TOP_CAT];
-       }
-
-       return NULL;
-}
-
-int init_single_phy(struct porttype *porttype, struct mii_dev *bus,
-                   uint bus_idx, uint m, uint phy_idx)
-{
-       struct phy_device *phydev;
-
-       phydev = phy_find_by_mask(bus, BIT(m * 8 + phy_idx));
-       printf(" %u", bus_idx * 32 + m * 8 + phy_idx);
-
-       if (!phydev)
-               puts("!");
-       else
-               ihs_phy_config(phydev, porttype->phy_invert_in_pol,
-                              porttype->phy_invert_out_pol);
-
-       return 0;
-}
-
-int init_octo_phys(uint octo_phy_mask)
-{
-       uint bus_idx;
-
-       /* there are up to four octo-phys on each mdio bus */
-       for (bus_idx = 0; bus_idx < bb_miiphy_buses_num; ++bus_idx) {
-               uint m;
-               uint octo_index = bus_idx * 4;
-               struct mii_dev *bus = NULL;
-               struct porttype *porttype = NULL;
-               int ret;
-
-               porttype = get_porttype(octo_phy_mask, bus_idx);
-
-               if (!porttype)
-                       continue;
-
-               for (m = 0; m < 4; ++m) {
-                       uint phy_idx;
-
-                       /**
-                        * Register a bus device if there is at least one phy
-                        * on the current bus
-                        */
-                       if (!m && octo_phy_mask & (0xf << octo_index)) {
-                               ret = register_miiphy_bus(bus_idx, &bus);
-                               if (ret)
-                                       return ret;
-                       }
-
-                       if (!(octo_phy_mask & BIT(octo_index + m)))
-                               continue;
-
-                       for (phy_idx = 0; phy_idx < 8; ++phy_idx)
-                               init_single_phy(porttype, bus, bus_idx, m,
-                                               phy_idx);
-               }
-       }
-
-       return 0;
-}
-
 /*
  * MII GPIO bitbang implementation
  * MDC MDIO bus
@@ -315,6 +219,102 @@ static int mii_delay(struct bb_miiphy_bus *bus)
        return 0;
 }
 
+int register_miiphy_bus(uint k, struct mii_dev **bus)
+{
+       int retval;
+       struct mii_dev *mdiodev = mdio_alloc();
+       char *name = bb_miiphy_buses[k].name;
+
+       if (!mdiodev)
+               return -ENOMEM;
+       strlcpy(mdiodev->name, name, MDIO_NAME_LEN);
+       mdiodev->read = bb_miiphy_read;
+       mdiodev->write = bb_miiphy_write;
+
+       retval = mdio_register(mdiodev);
+       if (retval < 0)
+               return retval;
+       *bus = miiphy_get_dev_by_name(name);
+
+       return 0;
+}
+
+struct porttype *get_porttype(uint octo_phy_mask, uint k)
+{
+       uint octo_index = k * 4;
+
+       if (!k) {
+               if (octo_phy_mask & 0x01)
+                       return &porttypes[PORTTYPE_MAIN_CAT];
+               else if (!(octo_phy_mask & 0x03))
+                       return &porttypes[PORTTYPE_16C_16F];
+       } else {
+               if (octo_phy_mask & (1 << octo_index))
+                       return &porttypes[PORTTYPE_TOP_CAT];
+       }
+
+       return NULL;
+}
+
+int init_single_phy(struct porttype *porttype, struct mii_dev *bus,
+                   uint bus_idx, uint m, uint phy_idx)
+{
+       struct phy_device *phydev;
+
+       phydev = phy_find_by_mask(bus, BIT(m * 8 + phy_idx));
+       printf(" %u", bus_idx * 32 + m * 8 + phy_idx);
+
+       if (!phydev)
+               puts("!");
+       else
+               ihs_phy_config(phydev, porttype->phy_invert_in_pol,
+                              porttype->phy_invert_out_pol);
+
+       return 0;
+}
+
+int init_octo_phys(uint octo_phy_mask)
+{
+       uint bus_idx;
+
+       /* there are up to four octo-phys on each mdio bus */
+       for (bus_idx = 0; bus_idx < bb_miiphy_buses_num; ++bus_idx) {
+               uint m;
+               uint octo_index = bus_idx * 4;
+               struct mii_dev *bus = NULL;
+               struct porttype *porttype = NULL;
+               int ret;
+
+               porttype = get_porttype(octo_phy_mask, bus_idx);
+
+               if (!porttype)
+                       continue;
+
+               for (m = 0; m < 4; ++m) {
+                       uint phy_idx;
+
+                       /**
+                        * Register a bus device if there is at least one phy
+                        * on the current bus
+                        */
+                       if (!m && octo_phy_mask & (0xf << octo_index)) {
+                               ret = register_miiphy_bus(bus_idx, &bus);
+                               if (ret)
+                                       return ret;
+                       }
+
+                       if (!(octo_phy_mask & BIT(octo_index + m)))
+                               continue;
+
+                       for (phy_idx = 0; phy_idx < 8; ++phy_idx)
+                               init_single_phy(porttype, bus, bus_idx, m,
+                                               phy_idx);
+               }
+       }
+
+       return 0;
+}
+
 struct bb_miiphy_bus bb_miiphy_buses[] = {
        {
                .name = "ihs0",
-- 
2.47.2

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