Convert the .its based approach to binman instruction covered in the
device tree generation. This reduces additional instructions and
integrates the former separate build step into building the u-boot.
Signed-off-by: Lothar Rubusch <l.rubu...@gmail.com>
---
..._arria10_enclustra_mercury_aa1-u-boot.dtsi | 44 +++++++++++++++++++
arch/arm/mach-socfpga/Kconfig | 1 +
board/enclustra/mercury_aa1/fpga.its | 32 --------------
doc/board/enclustra/mercury-aa1.rst | 3 ++
4 files changed, 48 insertions(+), 32 deletions(-)
delete mode 100644 board/enclustra/mercury_aa1/fpga.its
diff --git a/arch/arm/dts/socfpga_arria10_enclustra_mercury_aa1-u-boot.dtsi
b/arch/arm/dts/socfpga_arria10_enclustra_mercury_aa1-u-boot.dtsi
index 6e38286572..9587d2dddb 100644
--- a/arch/arm/dts/socfpga_arria10_enclustra_mercury_aa1-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_arria10_enclustra_mercury_aa1-u-boot.dtsi
@@ -18,6 +18,10 @@
compatible = "u-boot,fs-loader";
phandlepart = <&mmc 1>;
};
+
+ binman: binman {
+ multiple-images;
+ };
};
&fpga_mgr {
@@ -43,3 +47,43 @@
};
#endif
+
+&binman {
+ u-boot {
+ filename = "fpga.itb";
+
+ fit {
+ description = "FIT image with FPGA bistream";
+ fit,external-offset = <0>;
+ #address-cells = <1>;
+
+ images {
+ fpga-periph-1 {
+ description = "FPGA peripheral
bitstream";
+ type = "fpga";
+ compression = "none";
+ blob-ext {
+ filename =
"bitstream.periph.rbf";
+ };
+ };
+
+ fpga-core-1 {
+ description = "FPGA core bitstream";
+ type = "fpga";
+ compression = "none";
+ blob-ext {
+ filename = "bitstream.core.rbf";
+ };
+ };
+ };
+
+ configurations {
+ default = "config-1";
+ config-1 {
+ description = "Boot with FPGA early IO
release config";
+ fpga = "fpga-periph-1", "fpga-core-1";
+ };
+ };
+ };
+ };
+};
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 60d8c889dc..e7236a56f7 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -186,6 +186,7 @@ config TARGET_SOCFPGA_EBV_SOCRATES
config TARGET_SOCFPGA_ENCLUSTRA_MERCURY_AA1
bool "Enclustra Mercury+ AA1"
+ select BINMAN
select TARGET_SOCFPGA_ARRIA10
config TARGET_SOCFPGA_IS1
diff --git a/board/enclustra/mercury_aa1/fpga.its
b/board/enclustra/mercury_aa1/fpga.its
deleted file mode 100644
index cb42d61fbd..0000000000
--- a/board/enclustra/mercury_aa1/fpga.its
+++ /dev/null
@@ -1,32 +0,0 @@
-/dts-v1/;
-
-/ {
- description = "FIT image with FPGA bistream";
- #address-cells = <1>;
-
- images {
- fpga-periph-1 {
- description = "FPGA peripheral bitstream";
- data = /incbin/("../../../bitstream.periph.rbf");
- type = "fpga";
- arch = "arm";
- compression = "none";
- };
-
- fpga-core-1 {
- description = "FPGA core bitstream";
- data = /incbin/("../../../bitstream.core.rbf");
- type = "fpga";
- arch = "arm";
- compression = "none";
- };
- };
-
- configurations {
- default = "config-1";
- config-1 {
- description = "Boot with FPGA early IO release config";
- fpga = "fpga-periph-1", "fpga-core-1";
- };
- };
-};
diff --git a/doc/board/enclustra/mercury-aa1.rst
b/doc/board/enclustra/mercury-aa1.rst
index cba36aae2e..f3c629d42e 100644
--- a/doc/board/enclustra/mercury-aa1.rst
+++ b/doc/board/enclustra/mercury-aa1.rst
@@ -66,6 +66,9 @@ Build u-boot. Source your favorite toolchain for ARM first.
$ make socfpga_enclustra_mercury_aa1_defconfig
$ make -j8
+Note: Call ``make`` with ``NO_PYTHON=1`` where python tools unnecessarily falls
+back into additional python setup.
+
Setup and compile a boot script as needed. Depending on the boot-mode select
``sd-aa1.cmd`` for SD/eMMC, or ``qspi-aa1.cmd`` for QSPI flash.
--
2.25.1
