CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes.
Mark them as 'bootph-all' so they are available in all
pre-relocation phases.

Fixes below dts warnings:

<stdout>: Warning (reg_format): 
/bus@f4000/ethernet@8000000/mdio@f00/ethernet-phy@1:reg: property has invalid 
length (4 bytes) (#address-cells == 2, #size-cells == 1)
<stdout>: Warning (unit_address_vs_reg): /bus@f4000/ethernet@8000000/mdio@f00: 
node has a unit name, but no reg or ranges property
<stdout>: Warning (pci_device_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
<stdout>: Warning (simple_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (avoid_default_addr_size): 
/bus@f4000/ethernet@8000000/mdio@f00/ethernet-phy@1: Relying on default 
#address-cells value
<stdout>: Warning (avoid_default_addr_size): 
/bus@f4000/ethernet@8000000/mdio@f00/ethernet-phy@1: Relying on default 
#size-cells value
<stdout>: Warning (avoid_unnecessary_addr_size): Failed prerequisite 
'avoid_default_addr_size'
<stdout>: Warning (unique_unit_address): Failed prerequisite 
'avoid_default_addr_size'
<stdout>: Warning (msi_parent_property): 
/bus@f4000/bus@48000000/dma-controller@485c0100:msi-parent: Could not get 
phandle node for (cell 0)
<stdout>: Warning (msi_parent_property): 
/bus@f4000/bus@48000000/dma-controller@485c0000:msi-parent: Could not get 
phandle node for (cell 0)
<stdout>: Warning (phys_property): 
/bus@f4000/ethernet@8000000/ethernet-ports/port@2:phys: Could not get phandle 
node for (cell 0)

Signed-off-by: Roger Quadros <rog...@kernel.org>
---
 arch/arm/dts/k3-am642-sk-u-boot.dtsi | 36 ++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi 
b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
index 5599977f6c..40a53df0b0 100644
--- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
@@ -92,6 +92,38 @@
        bootph-all;
 };
 
+&inta_main_dmss {
+       bootph-all;
+};
+
+&main_pktdma {
+       bootph-all;
+};
+
+&mdio1_pins_default {
+       bootph-all;
+};
+
+&cpsw3g_mdio {
+       bootph-all;
+};
+
+&cpsw3g_phy0 {
+       bootph-all;
+};
+
+&cpsw3g_phy1 {
+       bootph-all;
+};
+
+&rgmii1_pins_default {
+       bootph-all;
+};
+
+&rgmii2_pins_default {
+       bootph-all;
+};
+
 &cpsw3g {
        bootph-all;
 
@@ -100,6 +132,10 @@
        };
 };
 
+&phy_gmii_sel {
+       bootph-all;
+};
+
 &cpsw_port2 {
        bootph-all;
 };
-- 
2.34.1

Reply via email to