When a Rockchip rk3066 board download key is pressed it hangs.
The rk3066 BROM doesn't have support to check the return to BROM,
so when a key is pressed the loop that reads data must be broken
by writing a "-1" to the variable that points to the next page address.
It then goes in download mode and waits for data on USB OTG and UART0.
Signed-off-by: Johan Jonker <jbx6...@gmail.com>
---
arch/arm/include/asm/arch-rockchip/boot0.h | 32 +++++++++++++++++++---
1 file changed, 28 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h
b/arch/arm/include/asm/arch-rockchip/boot0.h
index 0c375e543a5e..305461ce3751 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -3,6 +3,8 @@
* Copyright 2017 Theobroma Systems Design und Consulting GmbH
*/
+#include <asm/arch-rockchip/boot_mode.h>
+
/*
* Execution starts on the instruction following this 4-byte header
* (containing the magic 'RK30', 'RK31', 'RK32' or 'RK33'). This
@@ -23,17 +25,39 @@
* the first one may be overwritten, if this is the first stage
* contained in the final image created with mkimage)...
*/
- b 1f /* if overwritten, entry-address is at the next word */
+ b 1f /* if overwritten, entry-address is at the next word */
1:
#endif
#if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM)
- adr r3, entry_counter
+#if IS_ENABLED(CONFIG_ROCKCHIP_RK3066)
+/*
+ * Unlike newer Rockchip SoC models the rk3066 BROM code does not have
+ * built-in support to enter download mode after return to BROM code.
+ * Before a return the boot mode register must be checked for the
+ * BOOT_BROM_DOWNLOAD flag. Writing '-1' to a location in SRAM
+ * where the BROM stores the next page address breaks the loop
+ * that reads boot blocks. The boot ROM code then goes into a
+ * download mode and waits for data on USB OTG and UART0.
+ */
+ ldr r1, =BOOT_BROM_DOWNLOAD
+ ldr r0, =CONFIG_ROCKCHIP_BOOT_MODE_REG
+ ldr r0, [r0]
+ cmp r0, r1 /* if (readl(CONFIG_ROCKCHIP_BOOT_MODE_REG) ==
*/
+ bne counter_check /* BOOT_BROM_DOWNLOAD) { */
+ ldr r1, =0xffffffff
+ ldr r0, =0x10080028
+ str r1, [r0] /* writel(0xffffffff, 0x10080028); */
+ mov r0, #1 /* return 1; */
+ bx lr /* } */
+counter_check:
+#endif
+ adr r3, entry_counter
ldr r0, [r3]
cmp r0, #1 /* check if entry_counter == 1 */
beq reset /* regular bootup */
- add r0, #1
+ add r0, #1
str r0, [r3] /* increment the entry_counter in memory */
- mov r0, #0 /* return 0 to the BROM to signal 'OK' */
+ mov r0, #0 /* return 0 to the BROM to signal 'OK' */
bx lr /* return control to the BROM */
entry_counter:
.word 0
--
2.39.2
