- devicetree for ls1c300 SoC and board
- setup debug uart pins
Signed-off-by: Du Huanpeng <d...@hodcarrier.org>
---
arch/mips/dts/loongson32-ls1c300b.dtsi | 150 ++++++++++++++++++++++++
arch/mips/dts/ls1c300-eval.dts | 30 +++++
board/loongson/ls1c300-eval/Kconfig | 12 ++
board/loongson/ls1c300-eval/MAINTAINERS | 7 ++
board/loongson/ls1c300-eval/Makefile | 3 +
board/loongson/ls1c300-eval/board.c | 20 ++++
6 files changed, 222 insertions(+)
create mode 100644 arch/mips/dts/loongson32-ls1c300b.dtsi
create mode 100644 arch/mips/dts/ls1c300-eval.dts
create mode 100644 board/loongson/ls1c300-eval/Kconfig
create mode 100644 board/loongson/ls1c300-eval/MAINTAINERS
create mode 100644 board/loongson/ls1c300-eval/Makefile
create mode 100644 board/loongson/ls1c300-eval/board.c
diff --git a/arch/mips/dts/loongson32-ls1c300b.dtsi
b/arch/mips/dts/loongson32-ls1c300b.dtsi
new file mode 100644
index 0000000000..b2a89d0ae7
--- /dev/null
+++ b/arch/mips/dts/loongson32-ls1c300b.dtsi
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/ls1c300-clk.h>
+#include <dt-bindings/reset/ls1c300-reset.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "loongson,ls1c300-soc";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ reg = <0>;
+ compatible = "loongson,gs232", "mips,mips4Kc";
+ clocks = <&acc CLK_CPU_THROT>;
+ };
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ xtal: oscillator {
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ #clock-cells = <0>;
+ };
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ ranges;
+
+ acc: clock-controller@1fe78030 {
+ compatible = "loongson,ls1c300-clk";
+ clocks = <&xtal>;
+ #clock-cells = <1>;
+ reg = <0x1fe78030 0x8>, <0x1fe7c010 0x4>;
+ u-boot,dm-pre-reloc;
+ };
+
+ uart0: serial@1fe40000 {
+ compatible = "loongson,ls1c300-uart", "ns16550a";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe40000 0x100>;
+ status = "disabled";
+ };
+
+ uart1: serial@1fe44000 {
+ compatible = "loongson,ls1c300-uart", "ns16550a";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe44000 0x100>;
+ status = "disabled";
+ };
+
+ uart2: serial@1fe48000 {
+ compatible = "loongson,ls1c300-uart", "ns16550a";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe48000 0x100>;
+ resets = <&shut_ctrl UART2_SHUT>;
+ reset-names = "uart2";
+ status = "disabled";
+ };
+
+ uart3: serial@1fe4c000 {
+ compatible = "loongson,ls1c300-uart", "ns16550a";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe4c000 0x100>;
+ status = "disabled";
+ };
+
+ uart4: serial@1fe4c400 {
+ compatible = "loongson,ls1c300-uart", "ns16550a";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe4c400 0x100>;
+ status = "disabled";
+ };
+
+ uart5: serial@1fe4c500 {
+ compatible = "loongson,ls1c300-uart", "ns16550a";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe4c500 0x100>;
+ status = "disabled";
+ };
+
+ uart6: serial@1fe4c600 {
+ compatible = "loongson,ls1c300-uart", "ns16550a";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe4c600 0x100>;
+ status = "disabled";
+ };
+
+ uart7: serial@1fe4c700 {
+ compatible = "loongson,ls1c300-uart", "ns16550a";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe4c700 0x100>;
+ status = "disabled";
+ };
+
+ uart8: serial@1fe4c800 {
+ compatible = "loongson,ls1c300-uart", "ns16550a";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe4c800 0x100>;
+ status = "disabled";
+ };
+
+ uart9: serial@1fe4c900 {
+ compatible = "loongson,ls1c300-uart", "ns16550a";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe4c900 0x100>;
+ status = "disabled";
+ };
+
+ uart10: serial@1fe4ca00 {
+ compatible = "loongson,ls1c300-uart", "ns16550a";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe4ca00 0x100>;
+ status = "disabled";
+ };
+
+ uart11: serial@1fe4cb00 {
+ compatible = "loongson,ls1c300-uart", "ns16550a";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe4cb00 0x100>;
+ status = "disabled";
+ };
+
+ wdt: watchdog@1fe5c060 {
+ compatible = "loongson,ls1c300-wdt";
+ clocks = <&acc CLK_APB>;
+ reg = <0x1fe5c060 0x10>;
+ };
+
+ reset-controller {
+ compatible = "wdt-reboot";
+ wdt = <&wdt>;
+ };
+
+ shut_ctrl: reset-controller@1fd00420 {
+ compatible = "loongson,shut_ctrl";
+ reg = <0x1fd00420 0x4>;
+ #reset-cells = <1>;
+ };
+ };
+};
diff --git a/arch/mips/dts/ls1c300-eval.dts b/arch/mips/dts/ls1c300-eval.dts
new file mode 100644
index 0000000000..422e7a858c
--- /dev/null
+++ b/arch/mips/dts/ls1c300-eval.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Du Huanpeng <d...@hodcarrier.org>
+ */
+
+/dts-v1/;
+
+#include "loongson32-ls1c300b.dtsi"
+
+/ {
+ compatible = "lsmips,ls1c300-soc";
+ model = "ls1c300-eval";
+
+ aliases {
+ serial0 = &uart2;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x4000000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&uart2 {
+ status = "okay";
+};
diff --git a/board/loongson/ls1c300-eval/Kconfig
b/board/loongson/ls1c300-eval/Kconfig
new file mode 100644
index 0000000000..e427570a83
--- /dev/null
+++ b/board/loongson/ls1c300-eval/Kconfig
@@ -0,0 +1,12 @@
+if BOARD_LS1C300
+
+config SYS_BOARD
+ default "ls1c300-eval"
+
+config SYS_VENDOR
+ default "loongson"
+
+config SYS_CONFIG_NAME
+ default "ls1c300"
+
+endif
diff --git a/board/loongson/ls1c300-eval/MAINTAINERS
b/board/loongson/ls1c300-eval/MAINTAINERS
new file mode 100644
index 0000000000..5420198dab
--- /dev/null
+++ b/board/loongson/ls1c300-eval/MAINTAINERS
@@ -0,0 +1,7 @@
+LS1C300_EVAL BOARD
+M: Du Huanpeng<d...@hodcarrier.org>
+S: Maintained
+F: board/loongson/ls1c300-eval
+F: include/configs/ls1c300.h
+F: configs/ls1c300_defconfig
+F: arch/mips/dts/ls1c300-eval.dts
diff --git a/board/loongson/ls1c300-eval/Makefile
b/board/loongson/ls1c300-eval/Makefile
new file mode 100644
index 0000000000..db129c5aba
--- /dev/null
+++ b/board/loongson/ls1c300-eval/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += board.o
diff --git a/board/loongson/ls1c300-eval/board.c
b/board/loongson/ls1c300-eval/board.c
new file mode 100644
index 0000000000..6809d66515
--- /dev/null
+++ b/board/loongson/ls1c300-eval/board.c
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020-2022 Du Huanpeng <d...@hodcarrier.org>
+ */
+
+#include <common.h>
+#include <mach/serial.h>
+
+#if defined(CONFIG_DEBUG_UART_BOARD_INIT)
+
+#define UART2_RX 36
+#define UART2_TX 37
+#define AFUNC 2
+
+void board_debug_uart_init(void)
+{
+ gpio_set_alternate(UART2_TX, AFUNC);
+ gpio_set_alternate(UART2_RX, AFUNC);
+}
+#endif
--
2.34.1
