I'm not mips maintainer, so STOP sending me these emails, I'm not interested in them and I'm not going to read them.
On Wednesday 26 July 2023 00:46:10 Du Huanpeng wrote: > --- > Changelog for v5: > - add detail commit message > - small fix in watchdog driver > > Changelog for v4: > - rebase to [247aa5a191159ea7e03bf1918e22fbbb784cd410] > - fix rebase issues > - use spl without SPL_DM > - fix some more codingstyle > - fix some more typo > - add comments about writing sdram controler > - keep .noreoder and do not use delay slot > > Changelog for v3: > - change cpu clock id from CLK_CPU to CLK_CPU_THROT > - migrate all APB dev's clock id to CLK_APB > - remove uarts' <reg-shift> property to use default value <0> > - move /clocks/acc node to /soc/acc > - call clk_request() before use a clk > - make get_tbclk() return 1/2 clock of cpu > - disable debug_uart by default > - add ops for cpu_throt_factor clk > - declare MSEC_PER_SEC for converting between sec and msec > - return a error code when the wdt clock is out of range > - minor format and codingstyle fixes > - rebase to [9859465bfe838bc8264d45e1a1bed847bba74bad] > > Changelog for v2: > 1. dtsi: > add status disabled for uart0 ~ uart11 > remove bootargs from chosen > make serial0 alias for uart2 > oscillator remove @0 unit-address > change uart2 address to kuseg > > 2. cleanup Kconfig and update defconfig > - make these options configurable, disabled by default: > CMD_DM > DM_ETH > DM_GPIO > DM_SPI > DM_SPI_FLASH > DM_RESET > PINCONF > PINCTRL > PINMUX > RESET_LSMIPS > - make these options configurable, enabled by default: > CLK > DISPLAY_CPUINFO > SYSRESET > ROM_EXCEPTION_VECTORS > - disabled: > CONFIG_ENV_IS_IN_SPI_FLASH > > 3. fix codingstyle drivers/watchdog/lsmips-wdt.c > - priv->base + offset > - add comment for default clock value > > 4. remove address base definition header > - remove arch/mips/mach-lsmips/ls1c300/ls1c300.h > - clean up files uses this header > > 5. spl and debug uart > - add comment for spl & debug uart pinmuxing > - cleanup unused registers base header > > 6. dtsi > - add "loongson,ls1c300-uart" to all uart node > > 7. board dts > - add memory node to board dts, start at 0x80000000, size 64MB > > 8. Kconfig > - make ROM_EXCEPTION_VECTORS user configureable > - enable ROM_EXCEPTION_VECTORS in defconfig > > 9. > - seperate sdram_init to sdram_init.S > - add macro helpers to do sdram, pll lowlevel init > > 10. dtsi > - move clock nodes to /clocks/xxx > > 11. > - define CONFIG_SKIP_LOWLEVEL_INIT to 1 > > 12. > - remove option PINCTRL_LS1C300 from Kconfig > > 13. > - dram_init, use get_ram_size() to detect ram size. > > 14. clk driver > - create custom clock ops for PLL > - remove debug code > > 15. > - rebase to 59bffec43a657598b194b9eb30dc01eec06078c7 > - remove CONFIG_SYS_MONITOR_BASE from include/configs/ > > Du Huanpeng (6): > mips: initial build infrastructure for loongson SoCs > mips: ls1c300: add base support > mips: add a ls1c300 based board > mips: ls1c300: add clock driver > mips: ls1c300: add watchdog support > mips: ls1c300: add reset support based on watchdog driver > > MAINTAINERS | 15 ++ > arch/mips/Kconfig | 11 ++ > arch/mips/Makefile | 1 + > arch/mips/dts/Makefile | 1 + > arch/mips/dts/loongson32-ls1c300b.dtsi | 150 +++++++++++++++ > arch/mips/dts/ls1c300-eval.dts | 30 +++ > arch/mips/mach-lsmips/Kconfig | 76 ++++++++ > arch/mips/mach-lsmips/Makefile | 6 + > arch/mips/mach-lsmips/cpu.c | 19 ++ > arch/mips/mach-lsmips/include/mach/serial.h | 16 ++ > arch/mips/mach-lsmips/ls1c300/Makefile | 7 + > arch/mips/mach-lsmips/ls1c300/gpio.c | 66 +++++++ > arch/mips/mach-lsmips/ls1c300/init.c | 62 ++++++ > arch/mips/mach-lsmips/ls1c300/lowlevel_init.S | 135 +++++++++++++ > arch/mips/mach-lsmips/ls1c300/sdram.S | 96 ++++++++++ > arch/mips/mach-lsmips/ls1c300/serial.c | 109 +++++++++++ > arch/mips/mach-lsmips/spl.c | 47 +++++ > board/loongson/ls1c300-eval/Kconfig | 12 ++ > board/loongson/ls1c300-eval/MAINTAINERS | 7 + > board/loongson/ls1c300-eval/Makefile | 3 + > board/loongson/ls1c300-eval/board.c | 20 ++ > configs/ls1c300_defconfig | 53 ++++++ > drivers/clk/Makefile | 1 + > drivers/clk/lsmips/Makefile | 3 + > drivers/clk/lsmips/clk-ls1c300.c | 180 ++++++++++++++++++ > drivers/reset/Kconfig | 7 + > drivers/reset/Makefile | 1 + > drivers/reset/reset-lsmips.c | 118 ++++++++++++ > drivers/watchdog/Kconfig | 8 + > drivers/watchdog/Makefile | 1 + > drivers/watchdog/lsmips_wdt.c | 127 ++++++++++++ > include/configs/ls1c300.h | 34 ++++ > include/dt-bindings/clock/ls1c300-clk.h | 18 ++ > include/dt-bindings/reset/ls1c300-reset.h | 36 ++++ > 34 files changed, 1476 insertions(+) > create mode 100644 arch/mips/dts/loongson32-ls1c300b.dtsi > create mode 100644 arch/mips/dts/ls1c300-eval.dts > create mode 100644 arch/mips/mach-lsmips/Kconfig > create mode 100644 arch/mips/mach-lsmips/Makefile > create mode 100644 arch/mips/mach-lsmips/cpu.c > create mode 100644 arch/mips/mach-lsmips/include/mach/serial.h > create mode 100644 arch/mips/mach-lsmips/ls1c300/Makefile > create mode 100644 arch/mips/mach-lsmips/ls1c300/gpio.c > create mode 100644 arch/mips/mach-lsmips/ls1c300/init.c > create mode 100644 arch/mips/mach-lsmips/ls1c300/lowlevel_init.S > create mode 100644 arch/mips/mach-lsmips/ls1c300/sdram.S > create mode 100644 arch/mips/mach-lsmips/ls1c300/serial.c > create mode 100644 arch/mips/mach-lsmips/spl.c > create mode 100644 board/loongson/ls1c300-eval/Kconfig > create mode 100644 board/loongson/ls1c300-eval/MAINTAINERS > create mode 100644 board/loongson/ls1c300-eval/Makefile > create mode 100644 board/loongson/ls1c300-eval/board.c > create mode 100644 configs/ls1c300_defconfig > create mode 100644 drivers/clk/lsmips/Makefile > create mode 100644 drivers/clk/lsmips/clk-ls1c300.c > create mode 100644 drivers/reset/reset-lsmips.c > create mode 100644 drivers/watchdog/lsmips_wdt.c > create mode 100644 include/configs/ls1c300.h > create mode 100644 include/dt-bindings/clock/ls1c300-clk.h > create mode 100644 include/dt-bindings/reset/ls1c300-reset.h > > -- > 2.34.1 >
