On Wed, Sep 16, 2020 at 9:26 AM Martin Cerveny <mar...@c-home.cz> wrote: > > > > On Wed, 16 Sep 2020, Maxime Ripard wrote: > > > On Wed, Sep 16, 2020 at 04:10:48PM +0200, Martin Cerveny wrote: > >> Weird code or comment. This is variant is tested on V3s. > >> > >> Signed-off-by: Martin Cerveny <m.cerv...@computer.org> > > > > Generally speaking your commit logs are fairly concise, but it really > > becomes an issue when you're allegedly fixing a bug. > > > > There's a bunch of questions here that are completely up in the air: > > > > - What issue are you actually trying to fix, how can one reproduce it > > - You claim that there's no double clock on the DE2, according to > > what? > > - DE2 is used on way more SoCs than just the V3s, did you check/test > > on those SoCs as well? > > > > In general, a good commit log should not explain what you're doing but > > *why* you're doing it. The what can be quite easily figured out from the > > patch content, the why can't today, and it will be even harder in a > > year's time. > > > > Maxime > > > > I cannot issue more information on the problem: > - check original code - the "1x pll" was commented by #ifndef > (only "2x pll" is computed) > - but original author added comment "/* No double clock on DE2 */" > - V3s does not support "2x pll" in TCON_CLK_REG > > So I wrote where I tested this patch. > It should be discussed with original author.
Sorry, I don't remember the details on why the driver uses pll-video0-2x, that's the code from 2017 > Regards. > > CC: Vasily Khoruzhick <anars...@gmail.com>
