On Mon, Mar 23, 2020 at 3:45 AM Marek Vasut <ma...@denx.de> wrote:
>
> The RX descriptor field 3 should contain only OWN and BUF1V bits before
> being used for receiving data by the DMA engine. However, right now, if
> the descriptor was already used for receiving data and is being cleared,
> the field 3 is only modified and the aforementioned two bits are ORRed
> into the field. This could lead to a residual dirty bits being left in
> the field 3 from previous transfer, and it generally does. Fully set the
> field 3 instead to clear those residual dirty bits.
>
> Signed-off-by: Marek Vasut <ma...@denx.de>
> Cc: Joe Hershberger <joe.hershber...@ni.com>
> Cc: Patrice Chotard <patrice.chot...@st.com>
> Cc: Patrick Delaunay <patrick.delau...@st.com>
> Cc: Ramon Fried <rfried....@gmail.com>
> Cc: Stephen Warren <swar...@nvidia.com>
> ---
> drivers/net/dwc_eth_qos.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
> index 0564bebf76..4bce6d4290 100644
> --- a/drivers/net/dwc_eth_qos.c
> +++ b/drivers/net/dwc_eth_qos.c
> @@ -1242,7 +1242,7 @@ static int eqos_start(struct udevice *dev)
> struct eqos_desc *rx_desc = &(eqos->rx_descs[i]);
> rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf +
> (i * EQOS_MAX_PACKET_SIZE));
> - rx_desc->des3 |= EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
> + rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
> }
> eqos->config->ops->eqos_flush_desc(eqos->descs);
>
> @@ -1436,7 +1436,7 @@ static int eqos_free_pkt(struct udevice *dev, uchar
> *packet, int length)
> * writes to the rest of the descriptor too.
> */
> mb();
> - rx_desc->des3 |= EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
> + rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
> eqos->config->ops->eqos_flush_desc(rx_desc);
>
> writel((ulong)rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer);
> --
> 2.25.1
>
Reviewed-by: Ramon Fried <rfried....@gmail.com>
