po 14. 10. 2019 v 16:19 odesÃlatel Michal Simek <michal.si...@xilinx.com> napsal: > > Hi, > > use macros from headers and sync dtses with latest description. > > Thanks, > Michal > > > Michal Simek (6): > arm64: zynqmp: Switch to xlnx-zynqmp-clk header > arm64: zynqmp: Use backward compatible string for gem > dt-bindings: arm64: zynqmp: Add power and reset headers > arm64: zynqmp: Use reset header in zynqmp.dtsi > arm64: zynqmp: Use power header in zynqmp.dtsi > arm64: zynqmp: List lpd watchdog in dtsi > > Rajan Vaja (1): > dt-bindings: clock: zynqmp: Add clk header > > arch/arm/dts/zynqmp-clk-ccf.dtsi | 166 ++++++++---------- > arch/arm/dts/zynqmp-clk.dtsi | 4 + > arch/arm/dts/zynqmp.dtsi | 85 ++++++++- > drivers/clk/clk_zynqmp.c | 1 - > include/dt-bindings/clock/xlnx-zynqmp-clk.h | 126 +++++++++++++ > include/dt-bindings/power/xlnx-zynqmp-power.h | 39 ++++ > .../dt-bindings/reset/xlnx-zynqmp-resets.h | 130 ++++++++++++++ > 7 files changed, 450 insertions(+), 101 deletions(-) > create mode 100644 include/dt-bindings/clock/xlnx-zynqmp-clk.h > create mode 100644 include/dt-bindings/power/xlnx-zynqmp-power.h > create mode 100644 include/dt-bindings/reset/xlnx-zynqmp-resets.h > > -- > 2.17.1 >
Applied but with also adding power domain for SD1 in "arm64: zynqmp: Use power header in zynqmp.dtsi" M -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
