On 29.03.19 10:54, eugen.hris...@microchip.com wrote:
On 26.03.2019 14:16, Stefan Roese wrote:
This patch adds an alterative SPL version of atmel_serial_enable_clk().
This enables the usage of this driver without full clock support (in
drivers and DT nodes). This saves some space in the SPL image.
Please note that this fixed clock support is only added to the SPL code
in the DM_SERIAL part of this file. All boards not using SPL & DM_SERIAL
should not be affected.
Hello Stefan,
For example, sama5d2_xplained_mmc_defconfig has DM_SERIAL and SPL.
Ah, I was not aware of that. It also has CONFIG_SPL_CLK enabled,
that's why I didn't spot it. I should make sure that in such cases
the original atmel_serial_enable_clk() function is used.
BTW: I did not enable CONFIG_SPL_CLK for size reasons of the SPL.
This means it's affected ? If so, then it's not OK to take it as-is.
Sure, this is not good, as mentioned above. I'll re-work this
path to only enable the new fixed clock value for !SPL_CLK.
And another question, is the rest of your patch series OK if this patch
is missing ? Or it's any dependency on this ? the SPL for Gardena will
not fit in the SRAM without this patch ?
Without this patch, building the gardena board will break (IIRC),
most likely because the CLK stuff is missing. And enabling SPL_CLK
will result in a too big image.
Thanks,
Stefan
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