Implement SPI AHB, MOD clocks and resets for Allwinner A64.
Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
---
drivers/clk/sunxi/clk_a64.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c
index 1d0cd98183..09ff871aee 100644
--- a/drivers/clk/sunxi/clk_a64.c
+++ b/drivers/clk/sunxi/clk_a64.c
@@ -52,6 +52,8 @@ static const struct ccu_clk_tree a64_tree[] = {
};
static const struct ccu_clk_gate a64_gates[] = {
+ [CLK_BUS_SPI0] = GATE(0x060, BIT(20)),
+ [CLK_BUS_SPI1] = GATE(0x060, BIT(21)),
[CLK_BUS_OTG] = GATE(0x060, BIT(23)),
[CLK_BUS_EHCI0] = GATE(0x060, BIT(24)),
[CLK_BUS_EHCI1] = GATE(0x060, BIT(25)),
@@ -64,6 +66,9 @@ static const struct ccu_clk_gate a64_gates[] = {
[CLK_BUS_UART3] = GATE(0x06c, BIT(19)),
[CLK_BUS_UART4] = GATE(0x06c, BIT(20)),
+ [CLK_SPI0] = GATE(0x0a0, BIT(31)),
+ [CLK_SPI1] = GATE(0x0a4, BIT(31)),
+
[CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
[CLK_USB_PHY1] = GATE(0x0cc, BIT(9)),
[CLK_USB_HSIC] = GATE(0x0cc, BIT(10)),
@@ -77,6 +82,8 @@ static const struct ccu_reset a64_resets[] = {
[RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
[RST_USB_HSIC] = RESET(0x0cc, BIT(2)),
+ [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
+ [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
[RST_BUS_OTG] = RESET(0x2c0, BIT(23)),
[RST_BUS_EHCI0] = RESET(0x2c0, BIT(24)),
[RST_BUS_EHCI1] = RESET(0x2c0, BIT(25)),
--
2.18.0.321.gffc6fa0e3
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