Configure 1GiB address range in DDR LAW and
determine the RAM size. Fix DDR LAW afterwards.
Signed-off-by: Anatolij Gustschin <ag...@denx.de>
---
arch/ppc/cpu/mpc512x/fixed_sdram.c | 7 ++++++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/ppc/cpu/mpc512x/fixed_sdram.c
b/arch/ppc/cpu/mpc512x/fixed_sdram.c
index 72d524c..01ae0a5 100644
--- a/arch/ppc/cpu/mpc512x/fixed_sdram.c
+++ b/arch/ppc/cpu/mpc512x/fixed_sdram.c
@@ -78,7 +78,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
u32 *dram_init_seq, int seq_sz)
{
volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
- u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
+ u32 msize = 1024 * 1024 * 1024;
u32 msize_log2 = __ilog2(msize);
u32 i;
@@ -148,5 +148,10 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config,
out_be32(&im->mddrc.ddr_time_config0, mddrc_config->ddr_time_config0);
out_be32(&im->mddrc.ddr_sys_config, mddrc_config->ddr_sys_config);
+ msize = get_ram_size(CONFIG_SYS_DDR_BASE, 0x40000000);
+ /* Fix DDR Local Window for new size */
+ out_be32(&im->sysconf.ddrlaw.ar, __ilog2(msize) - 1);
+ sync_law(&im->sysconf.ddrlaw.ar);
+
return msize;
}
--
1.6.3.3
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