On Wed, 2018-12-12 at 06:12 -0800, Bin Meng wrote: > There is no need to expose RISCV_NDS to the Kconfig menu as it is > an ax25-specific option. Introduce a dedicated Kconfig option for > the cache ops of ax25 platform and use that to guard the cache ops. > > Signed-off-by: Bin Meng <bmeng...@gmail.com> > > --- > > Changes in v5: > - Introduced another Kconfig option for the cache ops on AX25 CPU, > so that it remains selectable in Kconfig menu, but only visible > to AX25 platform. > > Changes in v4: None > Changes in v3: None > Changes in v2: None > > arch/riscv/cpu/ax25/Kconfig | 17 ++++++++++++----- > arch/riscv/cpu/ax25/cache.c | 12 ++++++------ > board/AndesTech/ax25-ae350/Kconfig | 4 ++++ > 3 files changed, 22 insertions(+), 11 deletions(-) >
Reviewed-by: Lukas Auer <lukas.a...@aisec.fraunhofer.de> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot