sp cannot be loaded before restoring other registers.
Signed-off-by: Bin Meng <bmeng...@gmail.com>
Reviewed-by: Lukas Auer <lukas.a...@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <a...@brainfault.org>
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/riscv/cpu/mtrap.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/cpu/mtrap.S b/arch/riscv/cpu/mtrap.S
index a5ad558..da307e4 100644
--- a/arch/riscv/cpu/mtrap.S
+++ b/arch/riscv/cpu/mtrap.S
@@ -77,7 +77,6 @@ trap_entry:
#endif
csrs MODE_PREFIX(status), t0
LREG x1, 1 * REGBYTES(sp)
- LREG x2, 2 * REGBYTES(sp)
LREG x3, 3 * REGBYTES(sp)
LREG x4, 4 * REGBYTES(sp)
LREG x5, 5 * REGBYTES(sp)
@@ -107,5 +106,6 @@ trap_entry:
LREG x29, 29 * REGBYTES(sp)
LREG x30, 30 * REGBYTES(sp)
LREG x31, 31 * REGBYTES(sp)
+ LREG x2, 2 * REGBYTES(sp)
addi sp, sp, 32 * REGBYTES
MODE_PREFIX(ret)
--
2.7.4
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