At present the trap handler returns to hardcoded M-mode/S-mode. Change to returning to previous privilege level instead.
Signed-off-by: Bin Meng <bmeng...@gmail.com> Reviewed-by: Lukas Auer <lukas.a...@aisec.fraunhofer.de> Reviewed-by: Anup Patel <a...@brainfault.org> --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/riscv/cpu/mtrap.S | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/riscv/cpu/mtrap.S b/arch/riscv/cpu/mtrap.S index da307e4..407ecfa 100644 --- a/arch/riscv/cpu/mtrap.S +++ b/arch/riscv/cpu/mtrap.S @@ -68,14 +68,6 @@ trap_entry: jal handle_trap csrw MODE_PREFIX(epc), a0 -#ifdef CONFIG_RISCV_SMODE - /* Remain in S-mode after sret */ - li t0, SSTATUS_SPP -#else - /* Remain in M-mode after mret */ - li t0, MSTATUS_MPP -#endif - csrs MODE_PREFIX(status), t0 LREG x1, 1 * REGBYTES(sp) LREG x3, 3 * REGBYTES(sp) LREG x4, 4 * REGBYTES(sp) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot