> -----Original Message----- > From: Troy Kisky [mailto:troy.ki...@boundarydevices.com] > Sent: 2018年11月21日 1:47 > To: Peng Fan <peng....@nxp.com>; sba...@denx.de; Fabio Estevam > <fabio.este...@nxp.com> > Cc: u-boot@lists.denx.de; dl-linux-imx <linux-...@nxp.com> > Subject: Re: [U-Boot] [PATCH V2 14/15] drivers: ddr: introduce DDR driver for > i.MX8M > > On 11/20/2018 2:19 AM, Peng Fan wrote: > > +#define DDRC_MSTR_0 0x3d400000 > > +#define DDRC_STAT_0 0x3d400004 > > +#define DDRC_MSTR1_0 0x3d400008 > > + > > Are you are planning to use DDRC_xxxx_0 in .cfg files?
No. DDRC/PHY is initialized by C code. I did not receive more comments about other patches in this patchset. Stefano, Fabio, how about creating a follow up patch to remove the unused macros, or do you expect to create a v3 patchset for this removing? > > With SPL, I doubt the above are necessary. > > > +/**********************/ > > +#define DDRC_MSTR(X) (DDRC_IPS_BASE_ADDR(X) + 0x00) > > +#define DDRC_STAT(X) (DDRC_IPS_BASE_ADDR(X) + 0x04) > > +#define DDRC_MSTR1(X) (DDRC_IPS_BASE_ADDR(X) + 0x08) > > Or, do you ever use the above without X == 0 ? No. There might be more DDRC in future i.MX8M family, might not. Thanks, Peng. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
