Drop the non-dm code, those board which uses non-dm need
to define DM_SPI. u-boot build trigger the warning for
the same.

Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
---
 Makefile                |   5 +-
 drivers/spi/Makefile    |   2 +-
 drivers/spi/atmel_spi.c | 198 ----------------------------------------
 3 files changed, 4 insertions(+), 201 deletions(-)

diff --git a/Makefile b/Makefile
index 00f0117b16..502a8e15f8 100644
--- a/Makefile
+++ b/Makefile
@@ -919,8 +919,9 @@ ifeq ($(CONFIG_DM_I2C_COMPAT)$(CONFIG_SANDBOX),y)
        @echo "===================================================="
 endif
 ifeq ($(CONFIG_DM_SPI),)
-ifeq ($(filter $(CONFIG_DAVINCI_SPI) $(CONFIG_KIRKWOOD_SPI) 
$(CONFIG_MPC8XXX_SPI) \
-              $(CONFIG_MXC_SPI) $(CONFIG_OMAP3_SPI) $(CONFIG_TI_QSPI),y),y)
+ifeq ($(filter $(CONFIG_ATMEL_SPI) $(CONFIG_DAVINCI_SPI) 
$(CONFIG_KIRKWOOD_SPI) \
+              $(CONFIG_MPC8XXX_SPI) $(CONFIG_MXC_SPI) $(CONFIG_OMAP3_SPI) \
+              $(CONFIG_TI_QSPI),y),y)
        @echo "===================== WARNING ======================"
        @echo "This board uses SPI driver from drivers/spi/ without"
        @echo "enabling CONFIG_DM_SPI. Please enable CONFIG_DM_SPI"
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 6b8b92434c..e2c6435402 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -6,6 +6,7 @@
 # There are many options which enable SPI, so make this library available
 ifdef CONFIG_DM_SPI
 obj-y += spi-uclass.o
+obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
 obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
 obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
 obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
@@ -21,7 +22,6 @@ endif
 
 obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
 obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
-obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
 obj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o
 obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o
 obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index cf4de9ee1a..fad67137b9 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -14,210 +14,13 @@
 
 #include <asm/arch/clk.h>
 #include <asm/arch/hardware.h>
-#ifdef CONFIG_DM_SPI
 #include <asm/arch/at91_spi.h>
-#endif
 #ifdef CONFIG_DM_GPIO
 #include <asm/gpio.h>
 #endif
 
 #include "atmel_spi.h"
 
-#ifndef CONFIG_DM_SPI
-
-static int spi_has_wdrbt(struct atmel_spi_slave *slave)
-{
-       unsigned int ver;
-
-       ver = spi_readl(slave, VERSION);
-
-       return (ATMEL_SPI_VERSION_REV(ver) >= 0x210);
-}
-
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
-                       unsigned int max_hz, unsigned int mode)
-{
-       struct atmel_spi_slave  *as;
-       unsigned int            scbr;
-       u32                     csrx;
-       void                    *regs;
-
-       if (!spi_cs_is_valid(bus, cs))
-               return NULL;
-
-       switch (bus) {
-       case 0:
-               regs = (void *)ATMEL_BASE_SPI0;
-               break;
-#ifdef ATMEL_BASE_SPI1
-       case 1:
-               regs = (void *)ATMEL_BASE_SPI1;
-               break;
-#endif
-#ifdef ATMEL_BASE_SPI2
-       case 2:
-               regs = (void *)ATMEL_BASE_SPI2;
-               break;
-#endif
-#ifdef ATMEL_BASE_SPI3
-       case 3:
-               regs = (void *)ATMEL_BASE_SPI3;
-               break;
-#endif
-       default:
-               return NULL;
-       }
-
-
-       scbr = (get_spi_clk_rate(bus) + max_hz - 1) / max_hz;
-       if (scbr > ATMEL_SPI_CSRx_SCBR_MAX)
-               /* Too low max SCK rate */
-               return NULL;
-       if (scbr < 1)
-               scbr = 1;
-
-       csrx = ATMEL_SPI_CSRx_SCBR(scbr);
-       csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8);
-       if (!(mode & SPI_CPHA))
-               csrx |= ATMEL_SPI_CSRx_NCPHA;
-       if (mode & SPI_CPOL)
-               csrx |= ATMEL_SPI_CSRx_CPOL;
-
-       as = spi_alloc_slave(struct atmel_spi_slave, bus, cs);
-       if (!as)
-               return NULL;
-
-       as->regs = regs;
-       as->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS
-                       | ATMEL_SPI_MR_PCS(~(1 << cs) & 0xf);
-       if (spi_has_wdrbt(as))
-               as->mr |= ATMEL_SPI_MR_WDRBT;
-
-       spi_writel(as, CSR(cs), csrx);
-
-       return &as->slave;
-}
-
-void spi_free_slave(struct spi_slave *slave)
-{
-       struct atmel_spi_slave *as = to_atmel_spi(slave);
-
-       free(as);
-}
-
-int spi_claim_bus(struct spi_slave *slave)
-{
-       struct atmel_spi_slave *as = to_atmel_spi(slave);
-
-       /* Enable the SPI hardware */
-       spi_writel(as, CR, ATMEL_SPI_CR_SPIEN);
-
-       /*
-        * Select the slave. This should set SCK to the correct
-        * initial state, etc.
-        */
-       spi_writel(as, MR, as->mr);
-
-       return 0;
-}
-
-void spi_release_bus(struct spi_slave *slave)
-{
-       struct atmel_spi_slave *as = to_atmel_spi(slave);
-
-       /* Disable the SPI hardware */
-       spi_writel(as, CR, ATMEL_SPI_CR_SPIDIS);
-}
-
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
-               const void *dout, void *din, unsigned long flags)
-{
-       struct atmel_spi_slave *as = to_atmel_spi(slave);
-       unsigned int    len_tx;
-       unsigned int    len_rx;
-       unsigned int    len;
-       u32             status;
-       const u8        *txp = dout;
-       u8              *rxp = din;
-       u8              value;
-
-       if (bitlen == 0)
-               /* Finish any previously submitted transfers */
-               goto out;
-
-       /*
-        * TODO: The controller can do non-multiple-of-8 bit
-        * transfers, but this driver currently doesn't support it.
-        *
-        * It's also not clear how such transfers are supposed to be
-        * represented as a stream of bytes...this is a limitation of
-        * the current SPI interface.
-        */
-       if (bitlen % 8) {
-               /* Errors always terminate an ongoing transfer */
-               flags |= SPI_XFER_END;
-               goto out;
-       }
-
-       len = bitlen / 8;
-
-       /*
-        * The controller can do automatic CS control, but it is
-        * somewhat quirky, and it doesn't really buy us much anyway
-        * in the context of U-Boot.
-        */
-       if (flags & SPI_XFER_BEGIN) {
-               spi_cs_activate(slave);
-               /*
-                * sometimes the RDR is not empty when we get here,
-                * in theory that should not happen, but it DOES happen.
-                * Read it here to be on the safe side.
-                * That also clears the OVRES flag. Required if the
-                * following loop exits due to OVRES!
-                */
-               spi_readl(as, RDR);
-       }
-
-       for (len_tx = 0, len_rx = 0; len_rx < len; ) {
-               status = spi_readl(as, SR);
-
-               if (status & ATMEL_SPI_SR_OVRES)
-                       return -1;
-
-               if (len_tx < len && (status & ATMEL_SPI_SR_TDRE)) {
-                       if (txp)
-                               value = *txp++;
-                       else
-                               value = 0;
-                       spi_writel(as, TDR, value);
-                       len_tx++;
-               }
-               if (status & ATMEL_SPI_SR_RDRF) {
-                       value = spi_readl(as, RDR);
-                       if (rxp)
-                               *rxp++ = value;
-                       len_rx++;
-               }
-       }
-
-out:
-       if (flags & SPI_XFER_END) {
-               /*
-                * Wait until the transfer is completely done before
-                * we deactivate CS.
-                */
-               do {
-                       status = spi_readl(as, SR);
-               } while (!(status & ATMEL_SPI_SR_TXEMPTY));
-
-               spi_cs_deactivate(slave);
-       }
-
-       return 0;
-}
-
-#else
-
 #define MAX_CS_COUNT   4
 
 struct atmel_spi_platdata {
@@ -507,4 +310,3 @@ U_BOOT_DRIVER(atmel_spi) = {
        .priv_auto_alloc_size = sizeof(struct atmel_spi_priv),
        .probe  = atmel_spi_probe,
 };
-#endif
-- 
2.18.0.321.gffc6fa0e3

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Reply via email to