Dropped
- cf_spi driver
- CF_DSPI code
- CONFIG_CF_SPI, CF_DSPI items
Dropped becuase
- no active usage
- no dm conversion
- multiple pings for asking dm-conversion
- driver-model migration expiry
Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
---
arch/m68k/cpu/mcf5227x/cpu_init.c | 54 ---
arch/m68k/cpu/mcf5445x/cpu_init.c | 113 ------
configs/M52277EVB_defconfig | 1 -
configs/M52277EVB_stmicro_defconfig | 1 -
configs/M54418TWR_defconfig | 1 -
configs/M54418TWR_nand_mii_defconfig | 1 -
configs/M54418TWR_nand_rmii_defconfig | 1 -
configs/M54418TWR_nand_rmii_lowfreq_defconfig | 1 -
configs/M54418TWR_serial_mii_defconfig | 1 -
configs/M54418TWR_serial_rmii_defconfig | 1 -
configs/M54451EVB_defconfig | 1 -
configs/M54451EVB_stmicro_defconfig | 1 -
configs/M54455EVB_a66_defconfig | 1 -
configs/M54455EVB_defconfig | 1 -
configs/M54455EVB_i66_defconfig | 1 -
configs/M54455EVB_intel_defconfig | 1 -
configs/M54455EVB_stm33_defconfig | 1 -
configs/stmark2_defconfig | 1 -
drivers/spi/Kconfig | 6 -
drivers/spi/Makefile | 1 -
drivers/spi/cf_spi.c | 335 ------------------
include/configs/M52277EVB.h | 1 -
include/configs/M54418TWR.h | 1 -
include/configs/M54451EVB.h | 1 -
include/configs/M54455EVB.h | 1 -
include/configs/stmark2.h | 1 -
scripts/config_whitelist.txt | 1 -
27 files changed, 531 deletions(-)
delete mode 100644 drivers/spi/cf_spi.c
diff --git a/arch/m68k/cpu/mcf5227x/cpu_init.c
b/arch/m68k/cpu/mcf5227x/cpu_init.c
index 0d6a484a45..76f4fb34bc 100644
--- a/arch/m68k/cpu/mcf5227x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5227x/cpu_init.c
@@ -137,57 +137,3 @@ void uart_port_conf(int port)
break;
}
}
-
-#ifdef CONFIG_CF_DSPI
-void cfspi_port_conf(void)
-{
- gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
- out_8(&gpio->par_dspi,
- GPIO_PAR_DSPI_SIN_SIN | GPIO_PAR_DSPI_SOUT_SOUT |
- GPIO_PAR_DSPI_SCK_SCK);
-}
-
-int cfspi_claim_bus(uint bus, uint cs)
-{
- dspi_t *dspi = (dspi_t *) MMAP_DSPI;
- gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
- if ((in_be32(&dspi->sr) & DSPI_SR_TXRXS) != DSPI_SR_TXRXS)
- return -1;
-
- /* Clear FIFO and resume transfer */
- clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
-
- switch (cs) {
- case 0:
- clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_UNMASK);
- setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
- break;
- case 2:
- clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
- setbits_8(&gpio->par_timer, GPIO_PAR_TIMER_T2IN_DSPIPCS2);
- break;
- }
-
- return 0;
-}
-
-void cfspi_release_bus(uint bus, uint cs)
-{
- dspi_t *dspi = (dspi_t *) MMAP_DSPI;
- gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
- /* Clear FIFO */
- clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
-
- switch (cs) {
- case 0:
- clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
- break;
- case 2:
- clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
- break;
- }
-}
-#endif
diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c
b/arch/m68k/cpu/mcf5445x/cpu_init.c
index 7632d9262c..39a54f4546 100644
--- a/arch/m68k/cpu/mcf5445x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5445x/cpu_init.c
@@ -432,116 +432,3 @@ int fecpin_setclear(struct eth_device *dev, int setclear)
return 0;
}
#endif
-
-#ifdef CONFIG_CF_DSPI
-void cfspi_port_conf(void)
-{
- gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
-#ifdef CONFIG_MCF5445x
- out_8(&gpio->par_dspi,
- GPIO_PAR_DSPI_SIN_SIN |
- GPIO_PAR_DSPI_SOUT_SOUT |
- GPIO_PAR_DSPI_SCK_SCK);
-#endif
-
-#ifdef CONFIG_MCF5441x
- pm_t *pm = (pm_t *) MMAP_PM;
-
- out_8(&gpio->par_dspi0,
- GPIO_PAR_DSPI0_SIN_DSPI0SIN | GPIO_PAR_DSPI0_SOUT_DSPI0SOUT |
- GPIO_PAR_DSPI0_SCK_DSPI0SCK);
- out_8(&gpio->srcr_dspiow, 3);
-
- /* DSPI0 */
- out_8(&pm->pmcr0, 23);
-#endif
-}
-
-int cfspi_claim_bus(uint bus, uint cs)
-{
- dspi_t *dspi = (dspi_t *) MMAP_DSPI;
- gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
- if ((in_be32(&dspi->sr) & DSPI_SR_TXRXS) != DSPI_SR_TXRXS)
- return -1;
-
- /* Clear FIFO and resume transfer */
- clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
-
-#ifdef CONFIG_MCF5445x
- switch (cs) {
- case 0:
- clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
- setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
- break;
- case 1:
- clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
- setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
- break;
- case 2:
- clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
- setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
- break;
- case 3:
- clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK);
- setbits_8(&gpio->par_dma, GPIO_PAR_DMA_DACK0_PCS3);
- break;
- case 5:
- clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
- setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
- break;
- }
-#endif
-
-#ifdef CONFIG_MCF5441x
- switch (cs) {
- case 0:
- clrbits_8(&gpio->par_dspi0, ~GPIO_PAR_DSPI0_PCS0_MASK);
- setbits_8(&gpio->par_dspi0, GPIO_PAR_DSPI0_PCS0_DSPI0PCS0);
- break;
- case 1:
- clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
- setbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
- break;
- }
-#endif
-
- return 0;
-}
-
-void cfspi_release_bus(uint bus, uint cs)
-{
- dspi_t *dspi = (dspi_t *) MMAP_DSPI;
- gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-
- /* Clear FIFO */
- clrbits_be32(&dspi->mcr, DSPI_MCR_CTXF | DSPI_MCR_CRXF);
-
-#ifdef CONFIG_MCF5445x
- switch (cs) {
- case 0:
- clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
- break;
- case 1:
- clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
- break;
- case 2:
- clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
- break;
- case 3:
- clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK);
- break;
- case 5:
- clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
- break;
- }
-#endif
-
-#ifdef CONFIG_MCF5441x
- if (cs == 1)
- clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
-#endif
-}
-
-#endif
diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig
index efa5e7102b..882aefd78c 100644
--- a/configs/M52277EVB_defconfig
+++ b/configs/M52277EVB_defconfig
@@ -25,4 +25,3 @@ CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M52277EVB_stmicro_defconfig
b/configs/M52277EVB_stmicro_defconfig
index 3628729a48..f8be2e322e 100644
--- a/configs/M52277EVB_stmicro_defconfig
+++ b/configs/M52277EVB_stmicro_defconfig
@@ -24,4 +24,3 @@ CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig
index f69f405d5a..d204066232 100644
--- a/configs/M54418TWR_defconfig
+++ b/configs/M54418TWR_defconfig
@@ -24,4 +24,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_nand_mii_defconfig
b/configs/M54418TWR_nand_mii_defconfig
index 04ca3a8114..c37a79b9a3 100644
--- a/configs/M54418TWR_nand_mii_defconfig
+++ b/configs/M54418TWR_nand_mii_defconfig
@@ -23,4 +23,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_nand_rmii_defconfig
b/configs/M54418TWR_nand_rmii_defconfig
index f6acf6019d..0db0e3a836 100644
--- a/configs/M54418TWR_nand_rmii_defconfig
+++ b/configs/M54418TWR_nand_rmii_defconfig
@@ -23,4 +23,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig
b/configs/M54418TWR_nand_rmii_lowfreq_defconfig
index 6b631d6d4b..7e01cd78be 100644
--- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig
+++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig
@@ -23,4 +23,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_serial_mii_defconfig
b/configs/M54418TWR_serial_mii_defconfig
index b2266a0577..01c572782c 100644
--- a/configs/M54418TWR_serial_mii_defconfig
+++ b/configs/M54418TWR_serial_mii_defconfig
@@ -24,4 +24,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54418TWR_serial_rmii_defconfig
b/configs/M54418TWR_serial_rmii_defconfig
index f69f405d5a..d204066232 100644
--- a/configs/M54418TWR_serial_rmii_defconfig
+++ b/configs/M54418TWR_serial_rmii_defconfig
@@ -24,4 +24,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig
index 8448b6cfbf..f3ecbfe952 100644
--- a/configs/M54451EVB_defconfig
+++ b/configs/M54451EVB_defconfig
@@ -30,4 +30,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54451EVB_stmicro_defconfig
b/configs/M54451EVB_stmicro_defconfig
index ce5f65666c..b8c3cb1cf0 100644
--- a/configs/M54451EVB_stmicro_defconfig
+++ b/configs/M54451EVB_stmicro_defconfig
@@ -29,4 +29,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig
index f9be1c3773..af375de1a0 100644
--- a/configs/M54455EVB_a66_defconfig
+++ b/configs/M54455EVB_a66_defconfig
@@ -34,4 +34,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig
index abb69a966a..cd6aca9923 100644
--- a/configs/M54455EVB_defconfig
+++ b/configs/M54455EVB_defconfig
@@ -35,4 +35,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig
index 6050df5d51..a9815ae702 100644
--- a/configs/M54455EVB_i66_defconfig
+++ b/configs/M54455EVB_i66_defconfig
@@ -34,4 +34,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_intel_defconfig
b/configs/M54455EVB_intel_defconfig
index 686c00e318..99ae04ead3 100644
--- a/configs/M54455EVB_intel_defconfig
+++ b/configs/M54455EVB_intel_defconfig
@@ -34,4 +34,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/M54455EVB_stm33_defconfig
b/configs/M54455EVB_stm33_defconfig
index fc19de50d1..e122bdf724 100644
--- a/configs/M54455EVB_stm33_defconfig
+++ b/configs/M54455EVB_stm33_defconfig
@@ -34,4 +34,3 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MII=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig
index 48e851d4a4..613b7af1dd 100644
--- a/configs/stmark2_defconfig
+++ b/configs/stmark2_defconfig
@@ -26,5 +26,4 @@ CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ISSI=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_SPI=y
-CONFIG_CF_SPI=y
CONFIG_REGEX=y
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 56f5d30c74..ed72f401ca 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -278,12 +278,6 @@ config SOFT_SPI
Enable Soft SPI driver. This driver is to use GPIO simulate
the SPI protocol.
-config CF_SPI
- bool "ColdFire SPI driver"
- help
- Enable the ColdFire SPI driver. This driver can be used on
- some m68k SoCs.
-
config FSL_ESPI
bool "Freescale eSPI driver"
help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 19aa95b2ca..890e919f49 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -25,7 +25,6 @@ obj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o
obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o
obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o
obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
-obj-$(CONFIG_CF_SPI) += cf_spi.o
obj-$(CONFIG_DESIGNWARE_SPI) += designware_spi.o
obj-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o
diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c
deleted file mode 100644
index 522631cbbf..0000000000
--- a/drivers/spi/cf_spi.c
+++ /dev/null
@@ -1,335 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- *
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
- * TsiChung Liew (tsi-chung.l...@freescale.com)
- */
-
-#include <common.h>
-#include <spi.h>
-#include <malloc.h>
-#include <asm/immap.h>
-
-struct cf_spi_slave {
- struct spi_slave slave;
- uint baudrate;
- int charbit;
-};
-
-extern void cfspi_port_conf(void);
-extern int cfspi_claim_bus(uint bus, uint cs);
-extern void cfspi_release_bus(uint bus, uint cs);
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifndef CONFIG_SPI_IDLE_VAL
-#if defined(CONFIG_SPI_MMC)
-#define CONFIG_SPI_IDLE_VAL 0xFFFF
-#else
-#define CONFIG_SPI_IDLE_VAL 0x0
-#endif
-#endif
-
-#if defined(CONFIG_CF_DSPI)
-/* DSPI specific mode */
-#define SPI_MODE_MOD 0x00200000
-#define SPI_DBLRATE 0x00100000
-
-static inline struct cf_spi_slave *to_cf_spi_slave(struct spi_slave *slave)
-{
- return container_of(slave, struct cf_spi_slave, slave);
-}
-
-static void cfspi_init(void)
-{
- volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
-
- cfspi_port_conf(); /* port configuration */
-
- dspi->mcr = DSPI_MCR_MSTR | DSPI_MCR_CSIS7 | DSPI_MCR_CSIS6 |
- DSPI_MCR_CSIS5 | DSPI_MCR_CSIS4 | DSPI_MCR_CSIS3 |
- DSPI_MCR_CSIS2 | DSPI_MCR_CSIS1 | DSPI_MCR_CSIS0 |
- DSPI_MCR_CRXF | DSPI_MCR_CTXF;
-
- /* Default setting in platform configuration */
-#ifdef CONFIG_SYS_DSPI_CTAR0
- dspi->ctar[0] = CONFIG_SYS_DSPI_CTAR0;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR1
- dspi->ctar[1] = CONFIG_SYS_DSPI_CTAR1;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR2
- dspi->ctar[2] = CONFIG_SYS_DSPI_CTAR2;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR3
- dspi->ctar[3] = CONFIG_SYS_DSPI_CTAR3;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR4
- dspi->ctar[4] = CONFIG_SYS_DSPI_CTAR4;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR5
- dspi->ctar[5] = CONFIG_SYS_DSPI_CTAR5;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR6
- dspi->ctar[6] = CONFIG_SYS_DSPI_CTAR6;
-#endif
-#ifdef CONFIG_SYS_DSPI_CTAR7
- dspi->ctar[7] = CONFIG_SYS_DSPI_CTAR7;
-#endif
-}
-
-static void cfspi_tx(u32 ctrl, u16 data)
-{
- volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
-
- while ((dspi->sr & 0x0000F000) >= 4) ;
-
- dspi->tfr = (ctrl | data);
-}
-
-static u16 cfspi_rx(void)
-{
- volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
-
- while ((dspi->sr & 0x000000F0) == 0) ;
-
- return (dspi->rfr & 0xFFFF);
-}
-
-static int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
- void *din, ulong flags)
-{
- struct cf_spi_slave *cfslave = to_cf_spi_slave(slave);
- u16 *spi_rd16 = NULL, *spi_wr16 = NULL;
- u8 *spi_rd = NULL, *spi_wr = NULL;
- static u32 ctrl = 0;
- uint len = bitlen >> 3;
-
- if (cfslave->charbit == 16) {
- bitlen >>= 1;
- spi_wr16 = (u16 *) dout;
- spi_rd16 = (u16 *) din;
- } else {
- spi_wr = (u8 *) dout;
- spi_rd = (u8 *) din;
- }
-
- if ((flags & SPI_XFER_BEGIN) == SPI_XFER_BEGIN)
- ctrl |= DSPI_TFR_CONT;
-
- ctrl = (ctrl & 0xFF000000) | ((1 << slave->cs) << 16);
-
- if (len > 1) {
- int tmp_len = len - 1;
- while (tmp_len--) {
- if (dout != NULL) {
- if (cfslave->charbit == 16)
- cfspi_tx(ctrl, *spi_wr16++);
- else
- cfspi_tx(ctrl, *spi_wr++);
- cfspi_rx();
- }
-
- if (din != NULL) {
- cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL);
- if (cfslave->charbit == 16)
- *spi_rd16++ = cfspi_rx();
- else
- *spi_rd++ = cfspi_rx();
- }
- }
-
- len = 1; /* remaining byte */
- }
-
- if ((flags & SPI_XFER_END) == SPI_XFER_END)
- ctrl &= ~DSPI_TFR_CONT;
-
- if (len) {
- if (dout != NULL) {
- if (cfslave->charbit == 16)
- cfspi_tx(ctrl, *spi_wr16);
- else
- cfspi_tx(ctrl, *spi_wr);
- cfspi_rx();
- }
-
- if (din != NULL) {
- cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL);
- if (cfslave->charbit == 16)
- *spi_rd16 = cfspi_rx();
- else
- *spi_rd = cfspi_rx();
- }
- } else {
- /* dummy read */
- cfspi_tx(ctrl, CONFIG_SPI_IDLE_VAL);
- cfspi_rx();
- }
-
- return 0;
-}
-
-static struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave,
- uint mode)
-{
- /*
- * bit definition for mode:
- * bit 31 - 28: Transfer size 3 to 16 bits
- * 27 - 26: PCS to SCK delay prescaler
- * 25 - 24: After SCK delay prescaler
- * 23 - 22: Delay after transfer prescaler
- * 21 : Allow overwrite for bit 31-22 and bit 20-8
- * 20 : Double baud rate
- * 19 - 16: PCS to SCK delay scaler
- * 15 - 12: After SCK delay scaler
- * 11 - 8: Delay after transfer scaler
- * 7 - 0: SPI_CPHA, SPI_CPOL, SPI_LSB_FIRST
- */
- volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
- int prescaler[] = { 2, 3, 5, 7 };
- int scaler[] = {
- 2, 4, 6, 8,
- 16, 32, 64, 128,
- 256, 512, 1024, 2048,
- 4096, 8192, 16384, 32768
- };
- int i, j, pbrcnt, brcnt, diff, tmp, dbr = 0;
- int best_i, best_j, bestmatch = 0x7FFFFFFF, baud_speed;
- u32 bus_setup = 0;
-
- tmp = (prescaler[3] * scaler[15]);
- /* Maximum and minimum baudrate it can handle */
- if ((cfslave->baudrate > (gd->bus_clk >> 1)) ||
- (cfslave->baudrate < (gd->bus_clk / tmp))) {
- printf("Exceed baudrate limitation: Max %d - Min %d\n",
- (int)(gd->bus_clk >> 1), (int)(gd->bus_clk / tmp));
- return NULL;
- }
-
- /* Activate Double Baud when it exceed 1/4 the bus clk */
- if ((CONFIG_SYS_DSPI_CTAR0 & DSPI_CTAR_DBR) ||
- (cfslave->baudrate > (gd->bus_clk / (prescaler[0] * scaler[0])))) {
- bus_setup |= DSPI_CTAR_DBR;
- dbr = 1;
- }
-
- if (mode & SPI_CPOL)
- bus_setup |= DSPI_CTAR_CPOL;
- if (mode & SPI_CPHA)
- bus_setup |= DSPI_CTAR_CPHA;
- if (mode & SPI_LSB_FIRST)
- bus_setup |= DSPI_CTAR_LSBFE;
-
- /* Overwrite default value set in platform configuration file */
- if (mode & SPI_MODE_MOD) {
-
- if ((mode & 0xF0000000) == 0)
- bus_setup |=
- dspi->ctar[cfslave->slave.bus] & 0x78000000;
- else
- bus_setup |= ((mode & 0xF0000000) >> 1);
-
- /*
- * Check to see if it is enabled by default in platform
- * config, or manual setting passed by mode parameter
- */
- if (mode & SPI_DBLRATE) {
- bus_setup |= DSPI_CTAR_DBR;
- dbr = 1;
- }
- bus_setup |= (mode & 0x0FC00000) >> 4; /* PSCSCK, PASC, PDT */
- bus_setup |= (mode & 0x000FFF00) >> 4; /* CSSCK, ASC, DT */
- } else
- bus_setup |= (dspi->ctar[cfslave->slave.bus] & 0x78FCFFF0);
-
- cfslave->charbit =
- ((dspi->ctar[cfslave->slave.bus] & 0x78000000) ==
- 0x78000000) ? 16 : 8;
-
- pbrcnt = sizeof(prescaler) / sizeof(int);
- brcnt = sizeof(scaler) / sizeof(int);
-
- /* baudrate calculation - to closer value, may not be exact match */
- for (best_i = 0, best_j = 0, i = 0; i < pbrcnt; i++) {
- baud_speed = gd->bus_clk / prescaler[i];
- for (j = 0; j < brcnt; j++) {
- tmp = (baud_speed / scaler[j]) * (1 + dbr);
-
- if (tmp > cfslave->baudrate)
- diff = tmp - cfslave->baudrate;
- else
- diff = cfslave->baudrate - tmp;
-
- if (diff < bestmatch) {
- bestmatch = diff;
- best_i = i;
- best_j = j;
- }
- }
- }
- bus_setup |= (DSPI_CTAR_PBR(best_i) | DSPI_CTAR_BR(best_j));
- dspi->ctar[cfslave->slave.bus] = bus_setup;
-
- return &cfslave->slave;
-}
-#endif /* CONFIG_CF_DSPI */
-
-#ifdef CONFIG_CMD_SPI
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
- if (((cs >= 0) && (cs < 8)) && ((bus >= 0) && (bus < 8)))
- return 1;
- else
- return 0;
-}
-
-void spi_init(void)
-{
- cfspi_init();
-}
-
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode)
-{
- struct cf_spi_slave *cfslave;
-
- if (!spi_cs_is_valid(bus, cs))
- return NULL;
-
- cfslave = spi_alloc_slave(struct cf_spi_slave, bus, cs);
- if (!cfslave)
- return NULL;
-
- cfslave->baudrate = max_hz;
-
- /* specific setup */
- return cfspi_setup_slave(cfslave, mode);
-}
-
-void spi_free_slave(struct spi_slave *slave)
-{
- struct cf_spi_slave *cfslave = to_cf_spi_slave(slave);
-
- free(cfslave);
-}
-
-int spi_claim_bus(struct spi_slave *slave)
-{
- return cfspi_claim_bus(slave->bus, slave->cs);
-}
-
-void spi_release_bus(struct spi_slave *slave)
-{
- cfspi_release_bus(slave->bus, slave->cs);
-}
-
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
- void *din, unsigned long flags)
-{
- return cfspi_xfer(slave, bitlen, dout, din, flags);
-}
-#endif /* CONFIG_CMD_SPI */
diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h
index 83d774527a..fbaef5ffa9 100644
--- a/include/configs/M52277EVB.h
+++ b/include/configs/M52277EVB.h
@@ -101,7 +101,6 @@
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/* DSPI and Serial Flash */
-#define CONFIG_CF_DSPI
#define CONFIG_SYS_SBFHDR_SIZE 0x7
#ifdef CONFIG_CMD_SPI
# define CONFIG_SYS_DSPI_CS2
diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index 4b8ef38c0b..ea416c4aa1 100644
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -149,7 +149,6 @@
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/* DSPI and Serial Flash */
-#define CONFIG_CF_DSPI
#define CONFIG_SERIAL_FLASH
#define CONFIG_SYS_SBFHDR_SIZE 0x7
#ifdef CONFIG_CMD_SPI
diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h
index 87cdbae1db..158d0f6f84 100644
--- a/include/configs/M54451EVB.h
+++ b/include/configs/M54451EVB.h
@@ -114,7 +114,6 @@
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/* DSPI and Serial Flash */
-#define CONFIG_CF_DSPI
#define CONFIG_SERIAL_FLASH
#define CONFIG_SYS_SBFHDR_SIZE 0x7
#ifdef CONFIG_CMD_SPI
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index d41b7c4492..54af5790ab 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -141,7 +141,6 @@
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
/* DSPI and Serial Flash */
-#define CONFIG_CF_DSPI
#define CONFIG_SYS_SBFHDR_SIZE 0x13
#ifdef CONFIG_CMD_SPI
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index 33ddc67bf4..4b069543ec 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -63,7 +63,6 @@
#undef CONFIG_MCFPIT
/* DSPI and Serial Flash */
-#define CONFIG_CF_DSPI
#define CONFIG_SF_DEFAULT_SPEED 50000000
#define CONFIG_SERIAL_FLASH
#define CONFIG_ENV_SPI_BUS 0
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 1404fd855b..760d5e05dc 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -198,7 +198,6 @@ CONFIG_CDP_TRIGGER
CONFIG_CDP_VERSION
CONFIG_CFG_DATA_SECTOR
CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
-CONFIG_CF_DSPI
CONFIG_CF_SBF
CONFIG_CF_V2
CONFIG_CF_V3
--
2.18.0.321.gffc6fa0e3
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