Only the first four exception codes are defined. Add the missing
exception codes from the definition in RISC-V Privileged Architecture
Version 1.10.
Signed-off-by: Lukas Auer <lukas.a...@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng...@gmail.com>
Reviewed-by: Rick Chen <r...@andestech.com>
---
Changes in v2: None
arch/riscv/lib/interrupts.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c
index 62a16b4da9..6a12818c2b 100644
--- a/arch/riscv/lib/interrupts.c
+++ b/arch/riscv/lib/interrupts.c
@@ -67,7 +67,18 @@ static void _exit_trap(ulong code, ulong epc, struct pt_regs
*regs)
"Instruction access fault",
"Illegal instruction",
"Breakpoint",
- "Load address misaligned"
+ "Load address misaligned",
+ "Load access fault",
+ "Store/AMO address misaligned",
+ "Store/AMO access fault",
+ "Environment call from U-mode",
+ "Environment call from S-mode",
+ "Reserved",
+ "Environment call from M-mode",
+ "Instruction page fault",
+ "Load page fault",
+ "Reserved",
+ "Store/AMO page fault",
};
printf("exception code: %ld , %s , epc %lx , ra %lx\n",
--
2.17.2
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