The machine trap-vector base address (mtvec) must be aligned on a 4-byte
boundary. Add the necessary align directive to trap_entry.
This patch also removes the global directive for trap_entry, which is
not required.
Signed-off-by: Lukas Auer <lukas.a...@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng...@gmail.com>
---
Changes in v2: None
arch/riscv/cpu/start.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index bd5904500c..88b4aaa1c0 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -42,7 +42,6 @@ nmi_vector:
trap_vector:
j trap_entry
-.global trap_entry
handle_reset:
li t0, CONFIG_SYS_SDRAM_BASE
SREG a2, 0(t0)
@@ -208,6 +207,7 @@ call_board_init_r:
/*
* trap entry
*/
+.align 2
trap_entry:
addi sp, sp, -32*REGBYTES
SREG x1, 1*REGBYTES(sp)
--
2.17.2
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