Hi Ryder, On 12 October 2018 at 01:00, Ryder Lee <ryder....@mediatek.com> wrote: > This adds a general board file based on MT7629 SoCs from MediaTek. > > Apart from the generic parts (cpu) we add some low level init codes > and initialize the early clocks. > > Signed-off-by: Ryder Lee <ryder....@mediatek.com> > Signed-off-by: Weijie Gao <weijie....@mediatek.com> > --- > arch/arm/Kconfig | 14 +++ > arch/arm/Makefile | 1 + > arch/arm/include/asm/arch-mediatek/misc.h | 17 ++++ > arch/arm/mach-mediatek/Kconfig | 24 +++++ > arch/arm/mach-mediatek/Makefile | 6 ++ > arch/arm/mach-mediatek/cpu.c | 34 +++++++ > arch/arm/mach-mediatek/init.h | 11 +++ > arch/arm/mach-mediatek/mt7629/Makefile | 4 + > arch/arm/mach-mediatek/mt7629/init.c | 131 > ++++++++++++++++++++++++++ > arch/arm/mach-mediatek/mt7629/lowlevel_init.S | 50 ++++++++++ > arch/arm/mach-mediatek/spl.c | 43 +++++++++ > board/mediatek/mt7629/Kconfig | 17 ++++ > board/mediatek/mt7629/MAINTAINERS | 7 ++ > board/mediatek/mt7629/Makefile | 3 + > board/mediatek/mt7629/mt7629_rfb.c | 16 ++++ > configs/mt7629_rfb_defconfig | 73 ++++++++++++++ > include/configs/mt7629.h | 62 ++++++++++++ > 17 files changed, 513 insertions(+) > create mode 100644 arch/arm/include/asm/arch-mediatek/misc.h > create mode 100644 arch/arm/mach-mediatek/Kconfig > create mode 100644 arch/arm/mach-mediatek/Makefile > create mode 100644 arch/arm/mach-mediatek/cpu.c > create mode 100644 arch/arm/mach-mediatek/init.h > create mode 100644 arch/arm/mach-mediatek/mt7629/Makefile > create mode 100644 arch/arm/mach-mediatek/mt7629/init.c > create mode 100644 arch/arm/mach-mediatek/mt7629/lowlevel_init.S > create mode 100644 arch/arm/mach-mediatek/spl.c > create mode 100644 board/mediatek/mt7629/Kconfig > create mode 100644 board/mediatek/mt7629/MAINTAINERS > create mode 100644 board/mediatek/mt7629/Makefile > create mode 100644 board/mediatek/mt7629/mt7629_rfb.c > create mode 100644 configs/mt7629_rfb_defconfig > create mode 100644 include/configs/mt7629.h
Looks good. A few nits below > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index ccf2a84..eac03f0 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -668,6 +668,18 @@ config ARCH_MESON > targeted at media players and tablet computers. We currently > support the S905 (GXBaby) 64-bit SoC. > > +config ARCH_MEDIATEK > + bool "MediaTek SoCs" > + select DM > + select OF_CONTROL > + select SPL_DM if SPL > + select SPL_LIBCOMMON_SUPPORT if SPL > + select SPL_LIBGENERIC_SUPPORT if SPL > + select SPL_OF_CONTROL if SPL > + select SUPPORT_SPL > + help > + Support for the MediaTek SoCs family. Please add more info. What type of SoCs are these? What are the capabilities? Link to web site? datasheets? wiki? Or maybe point to a doc/README.mediatek? > + > config ARCH_MX8M > bool "NXP i.MX8M platform" > select ARM64 > @@ -1423,6 +1435,8 @@ source "arch/arm/mach-rmobile/Kconfig" > > source "arch/arm/mach-meson/Kconfig" > > +source "arch/arm/mach-mediatek/Kconfig" > + > source "arch/arm/mach-qemu/Kconfig" > > source "arch/arm/mach-rockchip/Kconfig" > diff --git a/arch/arm/Makefile b/arch/arm/Makefile > index 8f50560..ddb9618 100644 > --- a/arch/arm/Makefile > +++ b/arch/arm/Makefile > @@ -62,6 +62,7 @@ machine-$(CONFIG_ARCH_K3) += k3 > machine-$(CONFIG_ARCH_KEYSTONE) += keystone > # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD > machine-$(CONFIG_KIRKWOOD) += kirkwood > +machine-$(CONFIG_ARCH_MEDIATEK) += mediatek > machine-$(CONFIG_ARCH_MESON) += meson > machine-$(CONFIG_ARCH_MVEBU) += mvebu > # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA > diff --git a/arch/arm/include/asm/arch-mediatek/misc.h > b/arch/arm/include/asm/arch-mediatek/misc.h > new file mode 100644 > index 0000000..2530e78 > --- /dev/null > +++ b/arch/arm/include/asm/arch-mediatek/misc.h > @@ -0,0 +1,17 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (C) 2018 MediaTek Inc. > + */ > + > +#ifndef __MEDIATEK_MISC_H_ > +#define __MEDIATEK_MISC_H_ > + > +#define VER_BASE 0x08000000 > +#define VER_SIZE 0x10 > + > +#define APHW_CODE 0x00 > +#define APHW_SUBCODE 0x04 > +#define APHW_VER 0x08 > +#define APSW_VER 0x0c > + > +#endif /* __MEDIATEK_MISC_H_ */ > diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig > new file mode 100644 > index 0000000..a932e70 > --- /dev/null > +++ b/arch/arm/mach-mediatek/Kconfig > @@ -0,0 +1,24 @@ > +if ARCH_MEDIATEK > + > +config SYS_SOC > + default "mediatek" > + > +config SYS_VENDOR > + default "mediatek" > + > +choice > + prompt "MediaTek board select" > + > +config TARGET_MT7629 > + bool "MediaTek MT7629 SoC" > + select CPU_V7A > + select SPL > + select ARCH_MISC_INIT > + help > + Support MediaTek MT7629 SoC. Please describe the features of this SoC. > + > +endchoice > + > +source "board/mediatek/mt7629/Kconfig" > + > +endif > diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile > new file mode 100644 > index 0000000..852d330 > --- /dev/null > +++ b/arch/arm/mach-mediatek/Makefile > @@ -0,0 +1,6 @@ > +# SPDX-License-Identifier: GPL-2.0 > + > +obj-y += cpu.o > +obj-$(CONFIG_SPL_BUILD) += spl.o > + > +obj-$(CONFIG_TARGET_MT7629) += mt7629/ > diff --git a/arch/arm/mach-mediatek/cpu.c b/arch/arm/mach-mediatek/cpu.c > new file mode 100644 > index 0000000..2bfeab7 > --- /dev/null > +++ b/arch/arm/mach-mediatek/cpu.c > @@ -0,0 +1,34 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2018 MediaTek Inc. > + */ > + > +#include <common.h> > +#include <dm.h> > +#include <dm/uclass-internal.h> > +#include <wdt.h> dm/ goes after wdt.h https://www.denx.de/wiki/U-Boot/CodingStyle > + > +int arch_misc_init(void) > +{ > + struct udevice *wdt; > + int ret; > + > + ret = uclass_get_device(UCLASS_WDT, 0, &wdt); > + if (!ret) > + wdt_stop(wdt); > + > + return 0; > +} > + > +int arch_cpu_init(void) > +{ > + icache_enable(); > + > + return 0; > +} > + > +void enable_caches(void) > +{ > + /* Enable D-cache. I-cache is already enabled in start.S */ > + dcache_enable(); > +} > diff --git a/arch/arm/mach-mediatek/init.h b/arch/arm/mach-mediatek/init.h > new file mode 100644 > index 0000000..1d896fb > --- /dev/null > +++ b/arch/arm/mach-mediatek/init.h > @@ -0,0 +1,11 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (C) 2018 MediaTek Inc. > + */ > + > +#ifndef __MEDIATEK_INIT_H_ > +#define __MEDIATEK_INIT_H_ > + > +extern int mtk_soc_early_init(void); > + > +#endif /* __MEDIATEK_INIT_H_ */ > diff --git a/arch/arm/mach-mediatek/mt7629/Makefile > b/arch/arm/mach-mediatek/mt7629/Makefile > new file mode 100644 > index 0000000..007eb4a > --- /dev/null > +++ b/arch/arm/mach-mediatek/mt7629/Makefile > @@ -0,0 +1,4 @@ > +# SPDX-License-Identifier: GPL-2.0 > + > +obj-y += init.o > +obj-y += lowlevel_init.o > diff --git a/arch/arm/mach-mediatek/mt7629/init.c > b/arch/arm/mach-mediatek/mt7629/init.c > new file mode 100644 > index 0000000..8f195b5 > --- /dev/null > +++ b/arch/arm/mach-mediatek/mt7629/init.c > @@ -0,0 +1,131 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2018 MediaTek Inc. > + * Author: Ryder Lee <ryder....@mediatek.com> > + */ > + > +#include <clk.h> > +#include <common.h> > +#include <dm.h> > +#include <dm/uclass.h> > +#include <fdtdec.h> > +#include <linux/io.h> > +#include <ram.h> > +#include <asm/arch/misc.h> > +#include <asm/sections.h> fix ordering > + > +#include <dt-bindings/clock/mt7629-clk.h> > + > +#define L2_SHARE_CFG_MP0 0x7f0 > +#define L2_SHARE_MODE_OFF BIT(8) > + > +DECLARE_GLOBAL_DATA_PTR; > + > +int mtk_pll_early_init(void) > +{ > + unsigned long pll_rates[] = { > + [CLK_APMIXED_ARMPLL] = 1250000000, > + [CLK_APMIXED_MAINPLL] = 1120000000, > + [CLK_APMIXED_UNIV2PLL] = 1200000000, > + [CLK_APMIXED_ETH1PLL] = 500000000, > + [CLK_APMIXED_ETH2PLL] = 700000000, > + [CLK_APMIXED_SGMIPLL] = 650000000, > + }; > + struct udevice *dev; > + int ret, i; > + > + ret = uclass_get_device_by_driver(UCLASS_CLK, > + DM_GET_DRIVER(mtk_clk_apmixedsys), &dev); > + if (ret) > + return ret; > + > + /* configure default rate then enable apmixedsys */ > + for (i = 0; i < ARRAY_SIZE(pll_rates); i++) { > + struct clk clk = { .id = i, .dev = dev }; > + > + ret = clk_set_rate(&clk, pll_rates[i]); > + if (ret) > + return ret; > + > + ret = clk_enable(&clk); > + if (ret) > + return ret; > + } > + > + /* setup mcu bus */ > + ret = uclass_get_device_by_driver(UCLASS_SYSCON, > + DM_GET_DRIVER(mtk_mcucfg), &dev); > + if (ret) > + return ret; > + > + return 0; > +} > + > +int mtk_soc_early_init(void) > +{ > + struct udevice *dev; > + int ret; > + > + /* initialize early clocks */ > + ret = mtk_pll_early_init(); > + if (ret) > + return ret; > + > + ret = uclass_get_device(UCLASS_RAM, 0, &dev); Consider uclass_first_device_err(). Same elsewhere. > + if (ret) > + return ret; > + > + return 0; > +} > + > +int mach_cpu_init(void) > +{ > + void __iomem *base; > + int node; > + > + node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, > + "mediatek,mt7629-mcucfg"); Add a driver fopr this - don't access it directly. This could be a syscon device perhaps? > + base = (void __iomem *)fdtdec_get_addr(gd->fdt_blob, node, "reg"); dev_read_addr(). Please use the live tree functions. > + if (!base) > + return -ENOENT; > + > + /* disable L2C shared mode */ > + writel(L2_SHARE_MODE_OFF, base + L2_SHARE_CFG_MP0); > + > + return 0; > +} > + > +int dram_init(void) > +{ > + struct ram_info ram; > + struct udevice *dev; > + int ret; > + > + ret = uclass_get_device(UCLASS_RAM, 0, &dev); > + if (ret) > + return ret; > + > + ret = ram_get_info(dev, &ram); > + if (ret) > + return ret; > + > + debug("RAM init base=%lx, size=%x\n", ram.base, ram.size); > + > + gd->ram_size = ram.size; > + > + return 0; > +} > + > +int print_cpuinfo(void) > +{ > + void __iomem *chipid; > + u32 hwcode, swver; > + > + chipid = ioremap(VER_BASE, VER_SIZE); > + hwcode = readl(chipid + APHW_CODE); > + swver = readl(chipid + APSW_VER); > + > + printf("CPU: MediaTek MT%04x E%d\n", hwcode, (swver & 0xf) + 1); > + > + return 0; > +} [..] > new file mode 100644 > index 0000000..83ccbba > --- /dev/null > +++ b/board/mediatek/mt7629/Makefile > @@ -0,0 +1,3 @@ > +# SPDX-License-Identifier: GPL-2.0 > + > +obj-y += mt7629_rfb.o > diff --git a/board/mediatek/mt7629/mt7629_rfb.c > b/board/mediatek/mt7629/mt7629_rfb.c > new file mode 100644 > index 0000000..08468b5 > --- /dev/null > +++ b/board/mediatek/mt7629/mt7629_rfb.c > @@ -0,0 +1,16 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2018 MediaTek Inc. > + */ > + > +#include <common.h> > + > +DECLARE_GLOBAL_DATA_PTR; > + > +int board_init(void) > +{ > + /* address of boot parameters */ > + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; Do we need these? > + > + return 0; > +} [..] > diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h > new file mode 100644 > index 0000000..9b51e90 > --- /dev/null > +++ b/include/configs/mt7629.h > @@ -0,0 +1,62 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Configuration for MediaTek MT7629 SoC > + * > + * Copyright (C) 2018 MediaTek Inc. > + * Author: Ryder Lee <ryder....@mediatek.com> > + */ > + > +#ifndef __MT7629_H > +#define __MT7629_H > + > +#include <linux/sizes.h> > + > +/* Miscellaneous configurable options */ > +#define CONFIG_SETUP_MEMORY_TAGS > +#define CONFIG_INITRD_TAG > +#define CONFIG_CMDLINE_TAG > + > +#define CONFIG_SYS_MAXARGS 8 > +#define CONFIG_SYS_BOOTM_LEN SZ_64M > +#define CONFIG_SYS_CBSIZE SZ_1K > +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ > + sizeof(CONFIG_SYS_PROMPT) + 16) > + > +/* Size of malloc() pool */ > +#define CONFIG_SYS_MALLOC_LEN SZ_4M > + > +/* Environment */ > +#define CONFIG_ENV_SIZE SZ_4K > +/* Allow to overwrite serial and ethaddr */ > +#define CONFIG_ENV_OVERWRITE > + > +/* Defines for SPL */ > +#define CONFIG_SPL_STACK 0x106000 > +#define CONFIG_SPL_TEXT_BASE 0x201000 > +#define CONFIG_SPL_MAX_SIZE SZ_64K > +#define CONFIG_SPL_MAX_FOOTPRINT SZ_64K > +#define CONFIG_SPL_PAD_TO 0x10000 > + > +#define CONFIG_SPI_ADDR 0x30000000 > +#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO > +#define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO) > + > +/* SPL -> Uboot */ > +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE > +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M > - \ > + GENERATED_GBL_DATA_SIZE) > + > +/* UBoot -> Kernel */ > +#define CONFIG_SYS_SPL_ARGS_ADDR 0x40000000 > +#define CONFIG_LOADADDR 0x42007f1c > +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR > + > +/* Serial device */ > +#define CONFIG_SYS_NS16550_CLK 40000000 > +#define CONFIG_SYS_NS16550_MEM32 Can you use the device tree for this? > +#define CONFIG_BAUDRATE 115200 > + > +/* DRAM */ > +#define CONFIG_SYS_SDRAM_BASE 0x40000000 > + > +#endif > -- > 1.9.1 > Regards, Simon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
