> > > Hi Rick, > > > > > > On Wed, Sep 26, 2018 at 9:50 PM Bin Meng <bmeng...@gmail.com> wrote: > > > > > > > > This series adds QEMU RISC-V 'virt' board target support, with the > > > > hope of helping people easily test U-Boot on RISC-V. > > > > > > > > Some existing RISC-V codes have been changed to make it easily to > > > > support new targets. Some spotted coding style issues are fixed. > > > > > > > > This series is available at u-boot-x86/riscv-working for testing. > > > > > > > > Changes in v3: > > > > - net patch to print the relocation address in cmd 'bdinfo' > > > > - new patch to imply DM support for some common drivers > > > > - reword the reset message a little, and call hang() in the end > > > > > > > > Changes in v2: > > > > - Change Linux kernel entry parameters' type to support 32/64 bit > > > > - new patch to remove CSR read/write defines in encoding.h > > > > - new patch to pass mhartid CSR value to kernel > > > > - new patch to move do_reset() to a common place > > > > > > > > > > Any comments for v3? > > > > Ping?
Hi Bin Sorry! I was busy last week. Yes. The V3 patch-sets looks fine. But the merge window is closed. I miss it. I will sync u-boot-riscv.git to u-boot.git and merge the v3 patch-sets to u-boot-riscv.git this week. I am not sure if I can send pull request to Tom about those merges after the merge window was closed? Or I shall wait for next time merge window opening ? Rick _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
