It was observed sometimes U-Boot as the coreboot payload fails to
boot on QEMU. This is because TSC calibration fails with no valid
frequency. This adds default TSC frequency in the device tree.
Signed-off-by: Bin Meng <bmeng...@gmail.com>
---
arch/x86/dts/coreboot.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts
index a94f781..e212f3d 100644
--- a/arch/x86/dts/coreboot.dts
+++ b/arch/x86/dts/coreboot.dts
@@ -30,6 +30,10 @@
stdout-path = "/serial";
};
+ tsc-timer {
+ clock-frequency = <1000000000>;
+ };
+
pci {
compatible = "pci-x86";
u-boot,dm-pre-reloc;
--
2.7.4
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
