I can add this to my PR list (but probably won't get one out until tomorrow 
morning), or:

Acked-by: Tom Warren <twar...@nvidia.com>

If that'll get it in sooner.

Tom

-----Original Message-----
From: Tom Rini <tr...@konsulko.com> 
Sent: Wednesday, August 1, 2018 4:47 PM
To: Stephen Warren <swar...@wwwdotorg.org>
Cc: Tom Warren <twar...@nvidia.com>; u-boot@lists.denx.de; Simon Glass 
<s...@chromium.org>; Stephen Warren <swar...@nvidia.com>; Mark Kettenis 
<kette...@openbsd.org>; Alexander Graf <ag...@suse.de>
Subject: Re: [U-Boot] [PATCH] ARM: tegra: align carveout size

On Wed, Aug 01, 2018 at 05:26:10PM -0600, Stephen Warren wrote:
> On 07/31/2018 12:38 PM, Stephen Warren wrote:
> >From: Stephen Warren <swar...@nvidia.com>
> >
> >Align the size of the carveout region to 2M. This ensures that the 
> >size can be accurately represented by an LPAE page table that uses sections.
> >
> >This solves a bug (hang at boot time soon after printing the DRAM 
> >size) that only shows up when the following two commits are merged together:
> >d32e86bde8a3 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is 
> >supported
> >6e584e633d10 ARM: tegra: avoid using secure carveout RAM
> >
> >Cc: Mark Kettenis <kette...@openbsd.org>
> >Cc: Alexander Graf <ag...@suse.de>
> >Signed-off-by: Stephen Warren <swar...@nvidia.com>
> >---
> >This should be applied quickly since it fixes a regression that 
> >causes all boots to fail, which in turn causes test/py to reset and 
> >"reflash" the target board for each test, which causes the test to take eons.
> 
> Could we apply this please? My Jenkins system will love you because of 
> it:-)

I'm looking for one more person to Ack this, thanks!

--
Tom
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