From: Stephen Warren <swar...@nvidia.com>
Align the size of the carveout region to 2M. This ensures that the size
can be accurately represented by an LPAE page table that uses sections.
This solves a bug (hang at boot time soon after printing the DRAM size)
that only shows up when the following two commits are merged together:
d32e86bde8a3 ARM: HYP/non-sec: enable ARMV7_LPAE if HYP mode is supported
6e584e633d10 ARM: tegra: avoid using secure carveout RAM
Cc: Mark Kettenis <kette...@openbsd.org>
Cc: Alexander Graf <ag...@suse.de>
Signed-off-by: Stephen Warren <swar...@nvidia.com>
---
This should be applied quickly since it fixes a regression that causes
all boots to fail, which in turn causes test/py to reset and "reflash" the
target board for each test, which causes the test to take eons.
arch/arm/mach-tegra/board2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 5ecadf705e7e..421a71b3014d 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -252,7 +252,7 @@ static ulong carveout_size(void)
#elif defined(CONFIG_ARMV7_SECURE_RESERVE_SIZE)
// BASE+SIZE might not == 4GB. If so, we want the carveout to cover
// from BASE to 4GB, not BASE to BASE+SIZE.
- return (0 - CONFIG_ARMV7_SECURE_BASE);
+ return (0 - CONFIG_ARMV7_SECURE_BASE) & ~(SZ_2M - 1);
#else
return 0;
#endif
--
2.18.0
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