From: Chen-Yu Tsai <w...@csie.org>
On newer chips, there is a pair of EHCI/OHCI USB hosts for OTG host
mode. USB PHY passby must be configured for its corresponding PHY.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
---
arch/arm/mach-sunxi/usb_phy.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c
index bcf5f15..4ae0a77 100644
--- a/arch/arm/mach-sunxi/usb_phy.c
+++ b/arch/arm/mach-sunxi/usb_phy.c
@@ -245,7 +245,12 @@ void sunxi_usb_phy_init(int index)
sunxi_usb_phy_config(phy);
- if (phy->id != 0)
+ /*
+ * Later SoCs such as the H3, H5, A64 have proper hosts for OTG.
+ * As such the passby settings need to be set for them as well.
+ */
+ if (phy->id != 0 || IS_ENABLED(CONFIG_MACH_SUNXI_H3_H5) ||
+ IS_ENABLED(CONFIG_MACH_SUN50I))
sunxi_usb_phy_passby(phy, SUNXI_USB_PASSBY_EN);
#ifdef CONFIG_MACH_SUN8I_A83T
--
1.9.1
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