On 04.01.2010 11:42, Sudhakar Rajashekhara wrote:
> Hi Nick,
>
> On Mon, Jan 04, 2010 at 15:17:51, Nick Thompson wrote:
>> On 23/12/09 07:44, Sudhakar Rajashekhara wrote:
>>> From: Sekhar Nori<nsek...@ti.com>
>>>
>>> This adds a driver for the SPI controller found on davinci
>>> based SoCs from Texas Instruments.
>>>
>>> Signed-off-by: Sekhar Nori<nsek...@ti.com>
>>> Signed-off-by: Sudhakar Rajashekhara<sudhakar....@ti.com>
>>> ---
>>>   drivers/spi/Makefile      |    1 +
>>>   drivers/spi/davinci_spi.c |  205 
>>> +++++++++++++++++++++++++++++++++++++++++++++
>>>   drivers/spi/davinci_spi.h |   84 ++++++++++++++++++
>>>   3 files changed, 290 insertions(+), 0 deletions(-)
>>>   create mode 100644 drivers/spi/davinci_spi.c
>>>   create mode 100644 drivers/spi/davinci_spi.h
>>
>> ...
>>
>>> diff --git a/drivers/spi/davinci_spi.h b/drivers/spi/davinci_spi.h
>>> new file mode 100644
>>> index 0000000..b3bf916
>>> --- /dev/null
>>> +++ b/drivers/spi/davinci_spi.h
>>> @@ -0,0 +1,84 @@
>>> +/*
>>> + * Register definitions for the DaVinci SPI Controller
>>> + */
>>> +
>>> +/* Register offsets */
>>> +#define DAVINCI_SPI_GCR0   0x0000
>>> +#define DAVINCI_SPI_GCR1   0x0004
>>> +#define DAVINCI_SPI_INT0   0x0008
>>> +#define DAVINCI_SPI_LVL            0x000c
>>> +#define DAVINCI_SPI_FLG            0x0010
>>> +#define DAVINCI_SPI_PC0            0x0014
>>> +#define DAVINCI_SPI_PC1            0x0018
>>> +#define DAVINCI_SPI_PC2            0x001c
>>> +#define DAVINCI_SPI_PC3            0x0020
>>> +#define DAVINCI_SPI_PC4            0x0024
>>> +#define DAVINCI_SPI_PC5            0x0028
>>> +#define DAVINCI_SPI_DAT0   0x0038
>>> +#define DAVINCI_SPI_DAT1   0x003c
>>> +#define DAVINCI_SPI_BUF            0x0040
>>> +#define DAVINCI_SPI_EMU            0x0044
>>> +#define DAVINCI_SPI_DELAY  0x0048
>>> +#define DAVINCI_SPI_DEF            0x004c
>>> +#define DAVINCI_SPI_FMT0   0x0050
>>> +#define DAVINCI_SPI_FMT1   0x0054
>>> +#define DAVINCI_SPI_FMT2   0x0058
>>> +#define DAVINCI_SPI_FMT3   0x005c
>>> +#define DAVINCI_SPI_INTVEC0        0x0060
>>> +#define DAVINCI_SPI_INTVEC1        0x0064
>>
>> I think this ought to be a C structure, rather than register offsets?
>>
>
> I see that existing SPI drivers are not using structures for register defines.
> Off-late is there a shift in u-boot in favor of structures than macros for
> register definitions?

Yes.

E.g. what I did for OMAP3 SPI driver:

/* OMAP3 McSPI registers */
struct mcspi_channel {
        unsigned int chconf;            /* 0x2C, 0x40, 0x54, 0x68 */
        unsigned int chstat;            /* 0x30, 0x44, 0x58, 0x6C */
        unsigned int chctrl;            /* 0x34, 0x48, 0x5C, 0x70 */
        unsigned int tx;                /* 0x38, 0x4C, 0x60, 0x74 */
        unsigned int rx;                /* 0x3C, 0x50, 0x64, 0x78 */
};

struct mcspi {
        unsigned char res1[0x10];
        unsigned int sysconfig;         /* 0x10 */
        unsigned int sysstatus;         /* 0x14 */
        unsigned int irqstatus;         /* 0x18 */
        unsigned int irqenable;         /* 0x1C */
        unsigned int wakeupenable;      /* 0x20 */
        unsigned int syst;              /* 0x24 */
        unsigned int modulctrl;         /* 0x28 */
        struct mcspi_channel channel[4];
}

regs = (struct mcspi *)OMAP3_MCSPI1_BASE;

writel(value, regs->modulctrl);

Best regards

Dirk
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