From: Manish Narani <manish.nar...@xilinx.com>
This patch sets host quirk2 bit field for No 1.8V supported in case of
1.0 silicon. The 1.0 silicon doesn't have support for UHS-I modes. This
property will ensure the SD runs on High Speed mode.
Signed-off-by: Manish Narani <mnar...@xilinx.com>
Signed-off-by: Michal Simek <michal.si...@xilinx.com>
---
arch/arm/dts/zynqmp.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 9516c799d5d8..0984077bacf5 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -837,6 +837,8 @@
#stream-id-cells = <1>;
iommus = <&smmu 0x870>;
power-domains = <&pd_sd0>;
+ nvmem-cells = <&soc_revision>;
+ nvmem-cell-names = "soc_revision";
};
sdhci1: sdhci@ff170000 {
@@ -851,6 +853,8 @@
#stream-id-cells = <1>;
iommus = <&smmu 0x871>;
power-domains = <&pd_sd1>;
+ nvmem-cells = <&soc_revision>;
+ nvmem-cell-names = "soc_revision";
};
pinctrl0: pinctrl@ff180000 {
--
1.9.1
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