On Thu, Oct 5, 2017 at 8:07 AM, <chin.liang....@intel.com> wrote: > From: Chin Liang See <chin.liang....@intel.com> > > Add the base address map for Statix10 SoC > > Signed-off-by: Chin Liang See <chin.liang....@intel.com> > --- > arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 56 > ++++++++++++++++++++++ > 1 file changed, 56 insertions(+) > create mode 100644 arch/arm/mach-socfpga/include/mach/base_addr_s10.h > > diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h > b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h > new file mode 100644 > index 0000000..2fdc917 > --- /dev/null > +++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h > @@ -0,0 +1,56 @@ > +/* > + * Copyright (C) 2016-2017 Intel Corporation <www.intel.com> > + * > + * SPDX-License-Identifier: GPL-2.0 > + */ > + > +#ifndef _SOCFPGA_S10_BASE_HARDWARE_H_ > +#define _SOCFPGA_S10_BASE_HARDWARE_H_ > + > +#define SOCFPGA_SDR_SCHEDULER_ADDRESS 0xf8000400 > +#define SOCFPGA_HMC_MMR_IO48_ADDRESS 0xf8010000 > +#define SOCFPGA_SDR_ADDRESS 0xf8011000 > +#define SOCFPGA_SMMU_ADDRESS 0xfa000000 > +#define SOCFPGA_MAILBOX_ADDRESS 0xffA30000 > +#define SOCFPGA_USB0_ADDRESS 0xffb00000 > +#define SOCFPGA_USB1_ADDRESS 0xffb40000
USB address is obtainable from DT. > +#define SOCFPGA_NANDREGS_ADDRESS 0xffb80000 > +#define SOCFPGA_NANDDATA_ADDRESS 0xffb90000 > +#define SOCFPGA_UART0_ADDRESS 0xffc02000 > +#define SOCFPGA_UART1_ADDRESS 0xffc02100 > +#define SOCFPGA_I2C0_ADDRESS 0xffc02800 > +#define SOCFPGA_I2C1_ADDRESS 0xffc02900 > +#define SOCFPGA_I2C2_ADDRESS 0xffc02a00 > +#define SOCFPGA_I2C3_ADDRESS 0xffc02b00 > +#define SOCFPGA_I2C4_ADDRESS 0xffc02c00 I2C is also obtainabled Please check the other peripherals. Dinh _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
