On 17 April 2017 at 13:00, Maxim Sloyko <max...@google.com> wrote:
> Add support for clocks needed by MACs to ast2500 clock driver.
> The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
> PCLK_MAC2 for MAC1 and MAC2 respectively.
>
> The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
> SDK. It is not entirely clear from the datasheet how this clock is used
> by MACs, so not clear if the rate would ever need to be different. So,
> for now, hardcoding it is probably safer.
>
> The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through
> hardware strapping.
>
> So, the network driver would only need to enable these clocks, no need
> to configure the rate.
>
> Signed-off-by: Maxim Sloyko <max...@google.com>
> ---
>
> Changes in v1: None
>
> arch/arm/dts/ast2500-u-boot.dtsi | 8 +
> arch/arm/include/asm/arch-aspeed/scu_ast2500.h | 62 +++++-
> drivers/clk/aspeed/clk_ast2500.c | 265
> ++++++++++++++++++++++---
> include/dt-bindings/clock/ast2500-scu.h | 2 +
> 4 files changed, 304 insertions(+), 33 deletions(-)
Reviewed-by: Simon Glass <s...@chromium.org>
Wow that 10ms delay is pretty unfortunate!
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