On 04/05/2017 11:32 AM, Ley Foon Tan wrote:
> Restructure misc driver in the preparation to support A10.
> Move the Gen5 specific code to gen5 file.
>
> Change all uint32_t_to u32 and check return value from
> socfpga_bridges_reset.
>
> Signed-off-by: Ley Foon Tan <ley.foon....@intel.com>
[...]
> static void socfpga_sdram_apply_static_cfg(void)
> {
> - const uint32_t staticcfg = SOCFPGA_SDR_ADDRESS + 0x505c;
> - const uint32_t applymask = 0x8;
> - uint32_t val = readl(staticcfg) | applymask;
> + const u32 staticcfg = SOCFPGA_SDR_ADDRESS + 0x505c;
We should fix this, this is actually
static struct socfpga_sdr_ctrl *sdr_ctrl =
(struct socfpga_sdr_ctrl *)SDR_CTRLGRP_ADDRESS;
...
readl(&sdr_ctl->static_cfg) | applymask;
And we should fix this SOCFPGA_SDR_ADDRESS + 0x50xx; all over .
> + const u32 applymask = 0x8;
> + u32 val = readl(staticcfg) | applymask;
>
> /*
> * SDRAM staticcfg register specific:
>
--
Best regards,
Marek Vasut
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