On Tue, Nov 29, 2016 at 6:28 PM, Phil Edworthy <phil.edwor...@renesas.com> wrote: > With the existing code, when the requested SPI clock rate is near > to the lowest that can be achieved by the hardware (max divider > of the ref clock is 32), the generated clock rate is wrong. > For example, with a 50MHz ref clock, when asked for anything less > than a 1.5MHz SPI clock, the code sets up the divider to generate > 25MHz. > > This change fixes the calculation. > > Signed-off-by: Phil Edworthy <phil.edwor...@renesas.com>
Perhaps you missed, Marek Acked-by tag on previous version, don't worry will add while applying if any. Reviewed-by: Jagan Teki <ja...@openedev.com> thanks! -- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot