On Fri, Sep 11, 2009 at 1:47 PM, Olof Johansson <o...@lixom.net> wrote:
> Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
> over tftp.
>
> Based on the omap3 evm code. I added a new highlevel define for Tobi
> to avoid having it dependent on CMD_NET (which would seem backward in
> this case).
>
>
> Signed-off-by: Olof Johansson <o...@lixom.net>
>
Acked-by: Steve Sakoman <st...@sakoman.com>
> diff --git a/board/overo/overo.c b/board/overo/overo.c
> index dd6d286..4a67360 100644
> --- a/board/overo/overo.c
> +++ b/board/overo/overo.c
> @@ -32,6 +32,7 @@
> #include <twl4030.h>
> #include <asm/io.h>
> #include <asm/arch/mux.h>
> +#include <asm/arch/mem.h>
> #include <asm/arch/sys_proto.h>
> #include <asm/mach-types.h>
> #include "overo.h"
> @@ -62,6 +63,10 @@ int misc_init_r(void)
> twl4030_power_init();
> twl4030_led_init();
>
> +#if defined(CONFIG_OMAP3_OVERO_TOBI)
> + setup_net_chip();
> +#endif
> +
> dieid_num_r();
>
> return 0;
> @@ -76,4 +81,59 @@ int misc_init_r(void)
> void set_muxconf_regs(void)
> {
> MUX_OVERO();
> +#if defined(CONFIG_OMAP3_OVERO_TOBI)
> + MUX_OVERO_TOBI();
> +#endif
> +}
> +
> +#if defined(CONFIG_OMAP3_OVERO_TOBI)
> +/*
> + * Routine: setup_net_chip
> + * Description: Setting up the configuration GPMC registers specific to the
> + * Ethernet hardware.
> + */
> +static void setup_net_chip(void)
> +{
> + struct gpio *gpio3_base = (struct gpio *)OMAP34XX_GPIO3_BASE;
> + struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
> +
> + /* Configure GPMC registers */
> + writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
> + writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
> + writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
> + writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
> + writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
> + writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
> + writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
> +
> + /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
> + writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
> + /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
> + writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
> + /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
> + writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
> + &ctrl_base->gpmc_nadv_ale);
> +
> + /* Make GPIO 64 as output pin */
> + writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe);
> +
> + /* Now send a pulse on the GPIO pin */
> + writel(GPIO0, &gpio3_base->setdataout);
> + udelay(1);
> + writel(GPIO0, &gpio3_base->cleardataout);
> + udelay(1);
> + writel(GPIO0, &gpio3_base->setdataout);
> +}
> +#endif
> +
> +
> +
> +int board_eth_init(bd_t *bis)
> +{
> + int rc = 0;
> +#ifdef CONFIG_SMC911X
> + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
> +#endif
> + return rc;
> }
> +
> diff --git a/board/overo/overo.h b/board/overo/overo.h
> index 0b59120..f0ec18a 100644
> --- a/board/overo/overo.h
> +++ b/board/overo/overo.h
> @@ -33,6 +33,8 @@ const omap3_sysinfo sysinfo = {
> #endif
> };
>
> +static void setup_net_chip(void);
> +
> /*
> * IEN - Input Enable
> * IDIS - Input Disable
> @@ -378,4 +380,42 @@ const omap3_sysinfo sysinfo = {
> MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\
> MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/
>
> +#if defined(CONFIG_OMAP3_OVERO_TOBI)
> +#define MUX_OVERO_TOBI() \
> + MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)) /*GPMC_A1*/\
> + MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)) /*GPMC_A2*/\
> + MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)) /*GPMC_A3*/\
> + MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)) /*GPMC_A4*/\
> + MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)) /*GPMC_A5*/\
> + MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)) /*GPMC_A6*/\
> + MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)) /*GPMC_A7*/\
> + MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)) /*GPMC_A8*/\
> + MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)) /*GPMC_A9*/\
> + MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)) /*GPMC_A10*/\
> + MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)) /*GPMC_D0*/\
> + MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)) /*GPMC_D1*/\
> + MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)) /*GPMC_D2*/\
> + MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)) /*GPMC_D3*/\
> + MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)) /*GPMC_D4*/\
> + MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)) /*GPMC_D5*/\
> + MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)) /*GPMC_D6*/\
> + MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)) /*GPMC_D7*/\
> + MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)) /*GPMC_D8*/\
> + MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)) /*GPMC_D9*/\
> + MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)) /*GPMC_D10*/\
> + MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)) /*GPMC_D11*/\
> + MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)) /*GPMC_D12*/\
> + MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)) /*GPMC_D13*/\
> + MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)) /*GPMC_D14*/\
> + MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)) /*GPMC_D15*/\
> + MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0))
> /*GPMC_nCS5*/\
> + MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)) /*GPMC_CLK*/\
> + MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\
> + /* - SMSC911X_NRES*/\
> + MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176 */\
> + /* - LAN_INTR */\
> +
> +
> +#endif
> +
> #endif
> diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
> index 07a031b..6616b55 100644
> --- a/include/configs/omap3_overo.h
> +++ b/include/configs/omap3_overo.h
> @@ -28,7 +28,8 @@
> #define CONFIG_OMAP 1 /* in a TI OMAP core */
> #define CONFIG_OMAP34XX 1 /* which is a 34XX */
> #define CONFIG_OMAP3430 1 /* which is in a 3430 */
> -#define CONFIG_OMAP3_OVERO 1 /* working with overo */
> +#define CONFIG_OMAP3_OVERO 1 /* working with overo */
> +//#define CONFIG_OMAP3_OVERO_TOBI 1 /* overo mounted on tobi */
>
> #include <asm/arch/cpu.h> /* get chip and board defs */
> #include <asm/arch/omap3.h>
> @@ -105,9 +106,13 @@
> #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
> #undef CONFIG_CMD_IMI /* iminfo */
> #undef CONFIG_CMD_IMLS /* List all found images */
> -#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
> #undef CONFIG_CMD_NFS /* NFS support */
>
> +#if !defined(CONFIG_OMAP3_OVERO_TOBI)
> +#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
> +#endif
> +
> +
> #define CONFIG_SYS_NO_FLASH
> #define CONFIG_SYS_I2C_SPEED 100000
> #define CONFIG_SYS_I2C_SLAVE 1
> @@ -293,4 +298,18 @@ extern unsigned int boot_flash_sec;
> extern unsigned int boot_flash_type;
> #endif
>
> +#if defined(CONFIG_OMAP3_OVERO_TOBI)
> +/*----------------------------------------------------------------------------
> + * SMSC9115 Ethernet from SMSC9118 family
> +
> *----------------------------------------------------------------------------
> + */
> +
> +#define CONFIG_NET_MULTI
> +#define CONFIG_SMC911X 1
> +#define CONFIG_SMC911X_32_BIT
> +#define CONFIG_SMC911X_BASE 0x2C000000
> +
> +#endif /* (CONFIG_CMD_NET) */
> +
> +
> #endif /* __CONFIG_H */
>
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