On Mon, May 16, 2016 at 11:47:26AM +0530, Lokesh Vutla wrote: > In order to enable cpsw on AM335x ICEv2 board, the following needs to be done: > > 1)There are few on board jumper settings which gives a choice between > cpsw and PRUSS, that needs to be properly selected[1]. Even after selecting > this, there are few GPIOs which control these muxes that needs to be held > high. > > 2) The clock to PHY is provided by a PLL-based clock synthesizer[2] connected > via I2C. This needs to properly programmed and locked for PHY operation. > And PHY needs to be reset before before being used, which is also held by > a GPIO. > > 3) RMII mode needs to be selected. > > [1] http://www.ti.com/lit/zip/tidr336 > [2] http://www.ti.com/lit/ds/symlink/cdce913.pdf > > Reviewed-by: Tom Rini <tr...@konsulko.com> > Acked-by: Mugunthan V N <mugunthan...@ti.com> > Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Applied to u-boot/master, thanks! -- Tom
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