Hi Tom, I know this already merged to i.mx tree. I still have a question for the tIH-CA violation.
In my side, the value is ok. clk is 400MHz. (0x30 * 256.0) * (1000000000000.0/400000000.0) = 468.75ps. And according to spec, to 800M date rate, the minimum tIH value is 290ps. So I wonder how in your side it is tIH-CA violation. Regards, Peng. On Sun, Apr 03, 2016 at 02:06:05PM -0400, Tom Rini wrote: >On Sun, Apr 03, 2016 at 07:22:30PM +0200, Stefano Babic wrote: >> >> >> On 01/04/2016 23:54, Tom Rini wrote: >> > Having had a similar board and memory part under logic analyzer, a >> > tINIT3 violation was measured. The fix was involved keeping tXPR and >> > SDE_to_RST at the power-on defaults and setting RST_to_CKE the JEDEC >> > value for LPDDR2. There was also a tIH-CA violation and this was >> > resolved by writing the default value in rather than what the script >> > here uses. >> > >> > Cc: Fabio Estevam <fabio.este...@nxp.com> >> > Cc: Peng Fan <peng....@nxp.com> >> > Signed-off-by: Tom Rini <tr...@konsulko.com> >> > --- >> > board/freescale/mx6slevk/imximage.cfg | 4 ++-- >> > 1 file changed, 2 insertions(+), 2 deletions(-) >> > >> > diff --git a/board/freescale/mx6slevk/imximage.cfg >> > b/board/freescale/mx6slevk/imximage.cfg >> > index 16ea597..c77bbde 100644 >> > --- a/board/freescale/mx6slevk/imximage.cfg >> > +++ b/board/freescale/mx6slevk/imximage.cfg >> > @@ -70,7 +70,7 @@ DATA 4 0x020e05d0 0x00080000 >> > DATA 4 0x021b001c 0x00008000 >> > DATA 4 0x021b085c 0x1b4700c7 >> > DATA 4 0x021b0800 0xa1390003 >> > -DATA 4 0x021b0890 0x00300000 >> > +DATA 4 0x021b0890 0x00400000 >> > DATA 4 0x021b08b8 0x00000800 >> > DATA 4 0x021b081c 0x33333333 >> > DATA 4 0x021b0820 0x33333333 >> > @@ -92,7 +92,7 @@ DATA 4 0x021b0010 0x00100A82 >> > DATA 4 0x021b0014 0x00000093 >> > DATA 4 0x021b0018 0x00001688 >> > DATA 4 0x021b002c 0x0f9f26d2 >> > -DATA 4 0x021b0030 0x0000020e >> > +DATA 4 0x021b0030 0x009f0e10 >> > DATA 4 0x021b0038 0x00190778 >> > DATA 4 0x021b0008 0x00000000 >> > DATA 4 0x021b0040 0x0000004f >> >> Applied to u-boot-imx, thanks ! > >OK. But per 0/2 the SPL versions are out of sync and someone should >take care of that :) > >-- >Tom >_______________________________________________ >U-Boot mailing list >U-Boot@lists.denx.de >http://lists.denx.de/mailman/listinfo/u-boot _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
