On 02/16/2016 09:04 AM, Michal Simek wrote:
Hi Heiko,
On 16.2.2016 14:32, Heiko Schocher wrote:
Hello Michal,
Am 16.02.2016 um 13:12 schrieb Michal Simek:
Hi Stephen,
trying to run the latest testing on zynq board and getting this
main_signon error.
This is what I am running
./test/py/test.py --bd zynq_zc702 --build --board-identity zc702
and getting below.
Does this board has SPL support without SPL serial output?
I do load u-boot via jtag that's why SPL logs are not visible.
If so, can you try my patch:
http://patchwork.ozlabs.org/patch/583348/
I have applied your patch but it is still not working.
If I run full flow with SPL then I can't see any issue.
I assume this is resolved then?
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