Re: [U-Boot] [PATCH] arm: socfpga: Fix QSPI doesn't work on socdk board

[Chin Liang See]

On Wed, 2015-12-23 at 03:07 +0100, Marek Vasut wrote:
> On Wednesday, December 23, 2015 at 03:02:10 AM, ShengjiangWu wrote:

[..]

> > Hi Marek,
> > 
> > Yes, emac1 and qspi are working now. I'm afraid USB is not working,
> > 
> > => usb reset
> > resetting USB...
> > USB0:   Core Release: 2.93a
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > dwc_otg_core_host_init: Timeout!
> > scanning bus 0 for devices... 1 USB Device(s) found
> > => usb tree
> > USB device tree:
> >   1  Hub (480 Mb/s, 0mA)
> >       U-Boot Root Hub
> 
> Hm, darn. Can you or Chin check it ? It's either pinmux or wrong USB
> node
> in DT in arch/arm/dts/socfpga_cyclone5_socdk.dts .

I am still setting up the SPL into SD card. In the mean time, I believe
the error come from pinmux. Shengjiang, can you try out below change?

diff --git a/board/altera/cyclone5-socdk/qts/pinmux_config.h
b/board/altera/cyclone5-socdk/qts/pinmux_config.h
index 06783dc..fb8648b 100644
--- a/board/altera/cyclone5-socdk/qts/pinmux_config.h
+++ b/board/altera/cyclone5-socdk/qts/pinmux_config.h
@@ -8,20 +8,20 @@
#define __SOCFPGA_PINMUX_CONFIG_H__
 
const u8 sys_mgr_init_table[] = {
-       3, /* EMACIO0 */
-       3, /* EMACIO1 */
-       3, /* EMACIO2 */
-       3, /* EMACIO3 */
-       3, /* EMACIO4 */
-       3, /* EMACIO5 */
-       3, /* EMACIO6 */
-       3, /* EMACIO7 */
-       3, /* EMACIO8 */
-       3, /* EMACIO9 */
-       3, /* EMACIO10 */
-       3, /* EMACIO11 */
-       3, /* EMACIO12 */
-       3, /* EMACIO13 */
+       0, /* EMACIO0 */
+       2, /* EMACIO1 */
+       2, /* EMACIO2 */
+       2, /* EMACIO3 */
+       2, /* EMACIO4 */
+       2, /* EMACIO5 */
+       2, /* EMACIO6 */
+       2, /* EMACIO7 */
+       2, /* EMACIO8 */
+       0, /* EMACIO9 */
+       2, /* EMACIO10 */
+       2, /* EMACIO11 */
+       2, /* EMACIO12 */
+       2, /* EMACIO13 */
        0, /* EMACIO14 */
        0, /* EMACIO15 */
        0, /* EMACIO16 */

Thanks
Chin Liang
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