Dear Vikas, In message <1443053976-9112-2-git-send-email-vikas.mano...@st.com> you wrote: > No need to configure indirect trigger address for every read/write. ... > /* Indirect mode configurations */ > writel((plat->sram_size/2), plat->regbase + CQSPI_REG_SRAMPARTITION); > + writel((u32)plat->ahbbase & CQSPI_INDIRECTTRIGGER_ADDR_MASK, > + plat->regbase + CQSPI_REG_INDIRECTTRIGGER);
I did not mention this explicitly, so I do it here: Please fix this type cast issue globally, in all your patches. Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "Marriage is like a cage; one sees the birds outside desperate to get in, and those inside desperate to get out." - Montaigne _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
