The last 16 KiB of the SPI NOR contain some manufacturing information, which
should not be erased/overwritten.
Configure the protection bits BP2, BP1 and BP0 so that this region is
protected.
Signed-off-by: Otavio Salvador <ota...@ossystems.com.br>
---
Changes since v1:
- Use CONFIG_SPI_NOR_PROTECTION_STM
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 25 +++++++++++++++++++++++++
include/configs/cgtqmx6eval.h | 2 ++
2 files changed, 27 insertions(+)
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
index a9694d5..9aff08d 100644
--- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
+++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
@@ -31,6 +31,8 @@
#include <miiphy.h>
#include <netdev.h>
#include <micrel.h>
+#include <spi_flash.h>
+#include <spi.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -399,6 +401,22 @@ void setup_spinor(void)
gpio_direction_output(IMX_GPIO_NR(3, 19), 0);
}
+static void spinor_protect(void)
+{
+ struct spi_flash *spi;
+
+ spi = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
+ CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
+ /*
+ * Set BP2 BP1 BP0 to 001, so that the last 64 sectors
+ * can be protected (0x3f0000 to 0x3fffff).
+ *
+ * This area stores some manufacturing information that
+ * should not be erased.
+ */
+ spi_flash_cmd_write_status(spi, 1 << 2);
+}
+
#ifdef CONFIG_FSL_ESDHC
static struct fsl_esdhc_cfg usdhc_cfg[] = {
{USDHC2_BASE_ADDR},
@@ -711,3 +729,10 @@ int misc_init_r(void)
#endif
return 0;
}
+
+int board_late_init(void)
+{
+ spinor_protect();
+
+ return 0;
+}
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index 66f81ec..8110605 100644
--- a/include/configs/cgtqmx6eval.h
+++ b/include/configs/cgtqmx6eval.h
@@ -21,6 +21,7 @@
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
#define CONFIG_MISC_INIT_R
#define CONFIG_MXC_UART
@@ -34,6 +35,7 @@
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_SST
+#define CONFIG_SPI_NOR_PROTECTION_STM
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_SF_DEFAULT_SPEED 20000000
--
1.9.1
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