Hi Andreas,
I tested this commit on my picosam9g45, the design of the primary DDR
controller is equal to the at91sam9m10g45ek board.
0x20000000 is the memory at CS1 (not initialized/available)
0x70000000 is the memory at the primary DDR controller (should work)
On the picosam9g45 there is no NAND flash. When NAND /and/ DDR were
connected to the EBI the EBISHARE@DDRSDRC_CR bit had to be enabled.
Bootlog:
U-Boot SPL 2015.10-rc1-00450-gac60584 (Aug 18 2015 - 11:56:48)
mci: setting clock 258000 Hz, block size 512
mci: setting clock 258000 Hz, block size 512
mci: setting clock 258000 Hz, block size 512
mci: setting clock 33024000 Hz, block size 512
reading u-boot.img
reading u-boot.img
U-Boot 2015.10-rc1-00450-gac60584 (Aug 18 2015 - 11:56:48 +0000)
CPU: AT91SAM9G45
Crystal frequency: 12 MHz
CPU clock : 400 MHz
Master clock : 133.333 MHz
DRAM: 128 MiB
WARNING: Caches not enabled
NAND: atmel_nand: Fail to initialize #0 chip0 MiB
MMC: mci: 0
mci: setting clock 260416 Hz, block size 512
mci: setting clock 260416 Hz, block size 512
mci: setting clock 260416 Hz, block size 512
mci: setting clock 33333333 Hz, block size 512
reading uboot.env
In: serial
Out: serial
Err: serial
Net: macb0
Error: macb0 address not set.
Hit any key to stop autoboot: 0
U-Boot> mw 0x20000000 deadbeef 3
U-Boot> md 0x20000000 4
20000000: ffffffff ffffffff ffffffff ffffffff ................
U-Boot> mw 0x70000000 12c0ffee 3
U-Boot> md 0x70000000 4
70000000: 12c0ffee 12c0ffee 12c0ffee 73f00000 ...............s
U-Boot>
Andreas Bießmann schreef op 18-8-2015 om 12:30:
Hi Erik,
On 08/13/2015 03:43 PM, Erik van Luijk wrote:
On these boards the DDR is connected to a dedicated controller and not
to chip select 1 of the EBI.
from the specs this seems correct. Could I please get a Tested-by, since
I do not own one of these boards.
Tested-by: Erik van Luijk <evanlu...@interact.nl>
Best regards
Andreas
Regards Erik.
Signed-off-by: Erik van Luijk <evanlu...@interact.nl>
---
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 8 --------
board/siemens/corvus/board.c | 8 --------
2 files changed, 16 deletions(-)
diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
index 3e65d71..d2ade4d 100644
--- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
+++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
@@ -131,21 +131,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
void mem_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
struct atmel_mpddr ddr2;
- unsigned long csa;
ddr2_conf(&ddr2);
/* enable DDR2 clock */
writel(0x4, &pmc->scer);
- /* Chip select 1 is for DDR2/SDRAM */
- csa = readl(&mat->ebicsa);
- csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
- csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V;
- writel(csa, &mat->ebicsa);
-
/* DDRAM2 Controller initialize */
ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2);
}
diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
index 9001fcbcf..d74743f 100644
--- a/board/siemens/corvus/board.c
+++ b/board/siemens/corvus/board.c
@@ -144,21 +144,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
void mem_init(void)
{
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
struct atmel_mpddr ddr2;
- unsigned long csa;
ddr2_conf(&ddr2);
/* enable DDR2 clock */
writel(0x4, &pmc->scer);
- /* Chip select 1 is for DDR2/SDRAM */
- csa = readl(&mat->ebicsa);
- csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
- csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V;
- writel(csa, &mat->ebicsa);
-
/* DDRAM2 Controller initialize */
ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2);
}
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