On 14:07 Wed 01 Jul , Thomas Petazzoni wrote:
> Hello,
>
> Here is a patch that adds the support for the Calao USB A9263 board.
> This is my first board support contribution to U-Boot, so don't
> hesitate to comment and suggest improvements.
>
> Thanks,
>
> Thomas
this need to move after ---
>
> ---
and this before
> Support for the Calao USB A9263 board
>
> The Calao USB A9263 board is a board manufactured and sold by Calao
> Systems <http://www.calao-systems.com>. Its components are very
> similar to the AT91SAM9263EK board, so its configuration is based on
> the configuration of this board. There are however some differences:
> different clocks, no LCD, etc.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
>
> MAKEALL | 1
> Makefile | 3
> board/usb-a9263/Makefile | 56 +++++++++++++
> board/usb-a9263/config.mk | 1
> board/usb-a9263/led.c | 44 ++++++++++
> board/usb-a9263/partition.c | 37 ++++++++
> board/usb-a9263/usb-a9263.c | 189
> ++++++++++++++++++++++++++++++++++++++++++++
> include/configs/usb-a9263.h | 188
> +++++++++++++++++++++++++++++++++++++++++++
> 8 files changed, 519 insertions(+)
>
> +
> +#ifdef CONFIG_MACB
> +static void usb_a9263_macb_hw_init(void)
> +{
> + /* Enable clock */
> + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC);
> +
> + /*
> + * Disable pull-up on:
> + * RXDV (PC25) => PHY normal mode (not Test mode)
> + * ERX0 (PE25) => PHY ADDR0
> + * ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
> + *
> + * PHY has internal pull-down
> + */
> + writel(pin_to_mask(AT91_PIN_PC25),
> + pin_to_controller(AT91_PIN_PC0) + PIO_PUDR);
> + writel(pin_to_mask(AT91_PIN_PE25) |
> + pin_to_mask(AT91_PIN_PE26),
> + pin_to_controller(AT91_PIN_PE0) + PIO_PUDR);
> +
> + /* Need to reset PHY -> 500ms reset */
> + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
> + (AT91_RSTC_ERSTL & (0x0D << 8)) |
> + AT91_RSTC_URSTEN);
> +
> + at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
> +
> + /* Wait for end hardware reset */
> + while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
> +
> + /* Restore NRST value */
> + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
> + (AT91_RSTC_ERSTL & (0x0 << 8)) |
> + AT91_RSTC_URSTEN);
> +
please check recent Sedji fix for this
at91sam9260/9263: add back up for the rst(reset controller).
> + /* Re-enable pull-up */
> + writel(pin_to_mask(AT91_PIN_PC25),
> + pin_to_controller(AT91_PIN_PC0) + PIO_PUER);
> + writel(pin_to_mask(AT91_PIN_PE25) |
> + pin_to_mask(AT91_PIN_PE26),
> + pin_to_controller(AT91_PIN_PE0) + PIO_PUER);
> +
> + at91_macb_hw_init();
> +}
> +#endif
> +
<snip>
>> --- /dev/null
> +++ b/include/configs/usb-a9263.h
> @@ -0,0 +1,188 @@
> +/*
> + * (C) Copyright 2007-2008
> + * Stelian Pop <stelian....@leadtechdesign.com>
> + * Lead Tech Design <www.leadtechdesign.com>
> + * Thomas Petazzoni <thomas.petazz...@free-electrons.com>
> + *
> + * Configuration settings for the Calao USB-A9263 board.
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/* ARM asynchronous clock */
> +#define AT91_CPU_NAME "AT91SAM9263"
no-need please remove
> +#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
> +#define CONFIG_SYS_HZ 1000
> +
> +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
> +#define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/
> +#define CONFIG_CALAO_USB_A9263 1 /* on an Calao USB A 9263 Board
> */
> +#define CONFIG_ARCH_CPU_INIT
> +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff
> */
> +
> +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
> +#define CONFIG_SETUP_MEMORY_TAGS 1
> +#define CONFIG_INITRD_TAG 1
> +
> +#define CONFIG_SKIP_LOWLEVEL_INIT
> +#define CONFIG_SKIP_RELOCATE_UBOOT
> +
> +/*
> + * Hardware drivers
> + */
> +#define CONFIG_ATMEL_USART 1
> +#undef CONFIG_USART0
> +#undef CONFIG_USART1
> +#undef CONFIG_USART2
> +#define CONFIG_USART3 1 /* USART 3 is DBGU */
> +
> +/* LCD */
> +#undef CONFIG_LCD
> +
> +/* LED */
> +#define CONFIG_AT91_LED
> +#define CONFIG_RED_LED AT91_PIN_PB7 /* this is the power
> led */
> +#define CONFIG_GREEN_LED AT91_PIN_PB8 /* this is the user1
> led */
> +#define CONFIG_YELLOW_LED AT91_PIN_PC29 /* this is the user2
> led */
> +
> +#define CONFIG_BOOTDELAY 3
> +
> +/*
> + * BOOTP options
> + */
> +#define CONFIG_BOOTP_BOOTFILESIZE 1
> +#define CONFIG_BOOTP_BOOTPATH 1
> +#define CONFIG_BOOTP_GATEWAY 1
> +#define CONFIG_BOOTP_HOSTNAME 1
> +
> +/*
> + * Command line configuration.
> + */
> +#include <config_cmd_default.h>
> +#undef CONFIG_CMD_BDI
> +#undef CONFIG_CMD_FPGA
> +#undef CONFIG_CMD_IMI
> +#undef CONFIG_CMD_IMLS
> +#undef CONFIG_CMD_LOADS
> +#undef CONFIG_CMD_SOURCE
> +
> +#define CONFIG_CMD_PING 1
> +#define CONFIG_CMD_DHCP 1
> +#define CONFIG_CMD_NAND 1
> +#define CONFIG_CMD_USB 1
> +
> +/* SDRAM */
> +#define CONFIG_NR_DRAM_BANKS 1
> +#define PHYS_SDRAM 0x20000000
> +#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
> +
> +/* DataFlash */
> +#define CONFIG_ATMEL_DATAFLASH_SPI
> +#define CONFIG_HAS_DATAFLASH 1
> +#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
> +#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
> +#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
> +#define AT91_SPI_CLK 8000000
> +#define DATAFLASH_TCSS (0x1c << 16)
> +#define DATAFLASH_TCHS (0x1 << 24)
> +
> +/* no NOR flash */
> +#define CONFIG_SYS_NO_FLASH 1
> +
> +/* NAND flash */
> +#ifdef CONFIG_CMD_NAND
> +#define CONFIG_NAND_ATMEL
> +#define CONFIG_SYS_MAX_NAND_DEVICE 1
> +#define CONFIG_SYS_NAND_BASE 0x40000000
> +#define CONFIG_SYS_NAND_DBW_8 1
> +/* our ALE is AD21 */
> +#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
> +/* our CLE is AD22 */
> +#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
> +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
> +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22
> +#endif
> +
> +/* Ethernet */
> +#define CONFIG_MACB 1
> +#define CONFIG_RMII 1
> +#define CONFIG_NET_MULTI 1
> +#define CONFIG_NET_RETRY_COUNT 20
> +#define CONFIG_RESET_PHY_R 1
> +#define CONFIG_MACB_SEARCH_PHY 1
whitespace please fix
> +#define CONFIG_ETHADDR 00:0D:00:0D:00:AB
please remove
> +
Best Regards,
J.
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