On 06/04/2015 16:23, Fabio Estevam wrote:
> Since commit 32df39c741788e ("mx5: fix get_reset_cause") we have the following
> boot messages on a mx53qsb:
>
> U-Boot 2015.04-rc5-00029-gd68df02 (Apr 06 2015 - 11:15:39)
>
>
>
> CPU: Freescale i.MX53 rev2.1 at 800 MHz
>
> Reset cause: POR
>
> Board: MX53 LOCO
>
> I2C: ready
>
> DRAM: 1 GiB
>
> MMC: FSL_SDHC: 0, FSL_SDHC: 1
>
> In: serial
>
> Out: serial
>
> Err: serial
>
> CPU: Freescale i.MX53 rev2.1 at 1000 MHz
>
> Reset cause: unknown reset
>
> Net: FEC [PRIME]
>
> The CPU and Reset cause lines appear twice.
>
> Initially mx53 boots at 800MHz, then at a later point the PMIC is configured
> via
> I2C to raise the CPU voltage so that it can run at 1GHz.
>
> To avoid such misleading double printings, disable printing cpu info for now.
>
>
> Signed-off-by: Fabio Estevam <fabio.este...@freescale.com>
> ---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
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