Hi Hans, On 29 December 2014 at 12:17, Hans de Goede <hdego...@redhat.com> wrote: > Hi, > > > On 29-12-14 17:23, Simon Glass wrote: >> >> Hi Hans, >> >> On 24 December 2014 at 09:47, Hans de Goede <hdego...@redhat.com> wrote: >>> >>> Hi, >>> >>> On 23-12-14 05:36, Simon Glass wrote: >>>> >>>> >>>> Hi Hans, >>>> >>>> On 22 December 2014 at 09:45, Hans de Goede <hdego...@redhat.com> wrote: >>>>> >>>>> >>>>> Hi, >>>>> >>>>> On 21-12-14 19:52, Simon Glass wrote: >>>>>> >>>>>> >>>>>> >>>>>> Hi, >>>>>> >>>>>> I ran up a banana PI and noticed that HDMI works in U-Boot. Great! >>>>>> >>>>>> Scrolling seems very slow though - is the L2 cache disabled perhaps? >>>>> >>>>> >>>>> >>>>> >>>>> I don't think so, but it could be, I think the scrolling code is just >>>>> very inefficient. Feel free to poke things a bit around this, ARM >>>>> cache management is not my forte. >>>> >>>> >>>> >>>> I think it need ssomething like the code in exynos/soc.c - see >>>> v7_outer_cache_enable(). >>>> >>>> Even with the 7 inch it's very slow. >>> >>> >>> >>> I've run some tests, and it is not slower then on say the A10 (cortex >>> A8), >>> also I've been unable to find any docs or allwinner code pointing to >>> allwinner specific l2 cache init. As such ATM I do not believe that we've >>> the l2 cache disabled. >> >> >> Yes the code is not super-efficient (and could use the arch-specific >> memcpy()) but I'm mostly interested in whether the platform is running >> at full speed. >> >> I'm comparing it to say an Exynos 5250 which is 1.7GHz Cortex-A15. >> Without the L2 cache it scrolls quite slowly but with it it is fast. > > > Well this is a 1 GHz Cortex A7, and one with likely a much less > efficient DRAM controller / less DRAM bandwidth. > >> There is probably some cache setup required. > > > That could be, but if that is the case then I don't know where to start > looking for it. I certainly cannot find any such thing in allwinner;s > boot0 / boot1 bootloader.
Me neither, although I suppose the kernel sets it up. It should only be a few instructions to enable. It would be nice to have some memory bandwidth testing code in U-Boot perhaps... Regards, Simon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot