Dear Suriyan Ramasami,
On 25/10/14 01:08, Suriyan Ramasami wrote:
> Hello Minkyu Kang,
>
>
> On Thu, Oct 23, 2014 at 9:58 PM, Minkyu Kang <mk7.k...@samsung.com> wrote:
>> Dear Suriyan Ramasami,
>>
>> On 21/10/14 02:52, Suriyan Ramasami wrote:
>>> This change adds support for enabling the USB host features of the board.
>>> This includes the USB3503A hub and the SMC LAN9730 ethernet controller
>>> as well.
>>>
>>> Credit goes to Tushar Berara for the function set_usb_ethaddr().
>>>
>>> Signed-off-by: Suriyan Ramasami <suriya...@gmail.com>
>>>
>>> ---
>>> v2:
>>> * Removed an unneeded header file from ehci-exynos.c
>>> * Fix indentation in the dts file
>>> ---
>>> arch/arm/dts/exynos4412-odroid.dts | 11 +++++++
>>> arch/arm/include/asm/arch-exynos/cpu.h | 2 ++
>>> arch/arm/include/asm/arch-exynos/ehci.h | 13 ++++++++
>>> board/samsung/odroid/odroid.c | 55
>>> +++++++++++++++++++++++++++++++++
>>> drivers/usb/host/ehci-exynos.c | 51 +++++++++++++++++++++++++-----
>>> include/configs/odroid.h | 13 ++++++++
>>> 6 files changed, 137 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/arch/arm/dts/exynos4412-odroid.dts
>>> b/arch/arm/dts/exynos4412-odroid.dts
>>> index 24d0bf1..ac5fece 100644
>>> --- a/arch/arm/dts/exynos4412-odroid.dts
>>> +++ b/arch/arm/dts/exynos4412-odroid.dts
>>> @@ -67,4 +67,15 @@
>>> div = <0x3>;
>>> index = <4>;
>>> };
>>> +
>>> + ehci@12580000 {
>>> + compatible = "samsung,exynos-ehci";
>>> + reg = <0x12580000 0x100>;
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + phy {
>>> + compatible = "samsung,exynos-usb-phy";
>>> + reg = <0x125B0000 0x100>;
>>> + };
>>> + };
>>> };
>>> diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
>>> b/arch/arm/include/asm/arch-exynos/cpu.h
>>> index ba71714..fda21fb 100644
>>> --- a/arch/arm/include/asm/arch-exynos/cpu.h
>>> +++ b/arch/arm/include/asm/arch-exynos/cpu.h
>>> @@ -18,6 +18,8 @@
>>>
>>> #define EXYNOS4_GPIO_PART3_BASE 0x03860000
>>> #define EXYNOS4_PRO_ID 0x10000000
>>> +#define EXYNOS4_GUID_LOW 0x10000014
>>> +#define EXYNOS4_GUID_HIGH 0x10000018
>>> #define EXYNOS4_SYSREG_BASE 0x10010000
>>> #define EXYNOS4_POWER_BASE 0x10020000
>>> #define EXYNOS4_SWRESET 0x10020400
>>> diff --git a/arch/arm/include/asm/arch-exynos/ehci.h
>>> b/arch/arm/include/asm/arch-exynos/ehci.h
>>> index d2d70bd..3800fa9 100644
>>> --- a/arch/arm/include/asm/arch-exynos/ehci.h
>>> +++ b/arch/arm/include/asm/arch-exynos/ehci.h
>>> @@ -12,6 +12,13 @@
>>>
>>> #define CLK_24MHZ 5
>>>
>>> +#define PHYPWR_NORMAL_MASK_PHY0 (0x39 << 0)
>>> +#define PHYPWR_NORMAL_MASK_PHY1 (0x7 << 6)
>>> +#define PHYPWR_NORMAL_MASK_HSIC0 (0x7 << 9)
>>> +#define PHYPWR_NORMAL_MASK_HSIC1 (0x7 << 12)
>>> +#define RSTCON_HOSTPHY_SWRST (0xf << 3)
>>> +#define RSTCON_SWRST (0x1 << 0)
>>> +
>>> #define HOST_CTRL0_PHYSWRSTALL (1 << 31)
>>> #define HOST_CTRL0_COMMONON_N (1 << 9)
>>> #define HOST_CTRL0_SIDDQ (1 << 6)
>>> @@ -61,6 +68,12 @@ struct exynos_usb_phy {
>>> unsigned int usbotgtune;
>>> };
>>>
>>> +struct exynos4412_usb_phy {
>>> + unsigned int usbphyctrl;
>>> + unsigned int usbphyclk;
>>> + unsigned int usbphyrstcon;
>>> +};
>>> +
>>> /* Switch on the VBUS power. */
>>> int board_usb_vbus_init(void);
>>>
>>> diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
>>> index 5edb250..6c78b67 100644
>>> --- a/board/samsung/odroid/odroid.c
>>> +++ b/board/samsung/odroid/odroid.c
>>> @@ -453,9 +453,64 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
>>> .usb_phy_ctrl = EXYNOS4X12_USBPHY_CONTROL,
>>> .usb_flags = PHY0_SLEEP,
>>> };
>>> +#endif
>>> +
>>> +#if defined(CONFIG_USB_GADGET) || defined(CONFIG_CMD_USB)
>>> +
>>> +#ifdef CONFIG_CMD_USB
>>> +static void set_usb_ethaddr(void)
>>> +{
>>> + int i;
>>> + uchar mac[6];
>>> + unsigned int guid_high = readl(EXYNOS4_GUID_HIGH);
>>> + unsigned int guid_low = readl(EXYNOS4_GUID_LOW);
>>
>> We don't allow direct access.
>> Is it special register? I can't find this register on TRM.
>> If so you can make inline function at cpu.h instead.
>>
>
> This register is not in the TRM. This register is possibly documented
> in the TRM for the Exynos5250. Through experimentation I found that it
> behaves the same on Exynos4412 prime as well - I checked this with one
> X2, 1 U2 and 2 U3s, and they do indeed do the job of being unique and
> hence can be used to generate the mac address which will be unique
> across all U2s/U3s/X2s and possibly other Exynos SoCs like Exynos4212
> etc.
>
> Regarding direct access, I am a bit confused. In odroid.c I see quite
> a many places which is doing a readl() of registers. Here we are
> readl(addr) into guid_* similarly, and cooking up a mac address in a
> local char array.
>
> I fail to see your point. Can you please elaborate more, so I can comprehend?
>
Samsung SoCs always get the address of register using accessor
functions(samsung_get_base_xxx).
Thanks,
Minkyu Kang.
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