El Wed, Jun 03, 2009 at 02:50:40PM -0500 Scott Wood ha dit: > Matthias Kaehlcke wrote: >> hi, >> >> El Fri, May 15, 2009 at 05:30:48PM -0500 Scott Wood ha dit: >> >>> Matthias Kaehlcke wrote: >>>> +/* >>>> + * Board-specific function to access the device ready signal. >>>> + */ >>>> +static int kb9202_nand_ready(struct mtd_info *mtd) >>>> +{ >>>> + return (((AT91C_BASE_PIOC->PIO_PDSR) & KB9202_NAND_BUSY) != 0); >>>> +} >>> Use I/O accessors. > [snip] >> + if (ctrl & NAND_NCE) >> + AT91C_BASE_PIOC->PIO_CODR = KB9202_NAND_NCE; >> + else >> + AT91C_BASE_PIOC->PIO_SODR = KB9202_NAND_NCE; > > You're still not using I/O accessors in many places. > >> +#ifdef CONFIG_CMD_NAND > > Put this in the makefile instead. > >> +static int kb9202_nand_ready(struct mtd_info *mtd) >> +{ >> + const unsigned int value = readl(AT91C_PIOC_PDSR); >> + >> + return ((value & KB9202_NAND_BUSY) != 0); >> +} > > static int kb9202_nand_ready(struct mtd_info *mtd) > { > return readl(AT91C_PIOC_PDSR) & KB9202_NAND_BUSY; > } > >> +int board_nand_init(struct nand_chip *nand) >> +{ >> + unsigned int value; >> + struct _AT91S_SMC2 *at91s_smc2 = AT91C_BASE_SMC2; >> + >> + nand->ecc.mode = NAND_ECC_SOFT; >> + nand->options &= ~(NAND_BUSWIDTH_16); > > Unnecessary parens. > >> + nand->cmd_ctrl = kb9202_nand_hwcontrol; >> + nand->dev_ready = kb9202_nand_ready; >> + >> + /* in case running outside of bootloader */ >> + AT91C_BASE_PMC->PMC_PCER = ((unsigned) 1 << AT91C_ID_PIOC); > > Unnecessary cast and parens. > >> + at91s_smc2->SMC2_CSR[3] = >> + AT91C_SMC2_WSEN | >> + (4 & AT91C_SMC2_NWS) | >> + ((1 << 8) & AT91C_SMC2_TDF) | >> + AT91C_SMC2_DBW_8 | >> + ((1 << 24) & AT91C_SMC2_RWSETUP) | >> + ((1 << 29) & AT91C_SMC2_RWHOLD); > > Are those instances of (constant1 & constant2) ever going to evaluate to > anything but constant1? Can we get rid of the magic numbers? > > Otherwise, ACK.
thanks for your comments! i hope this version of the patch addresses all your concerns -- This is a forward port of the patch submitted by Christian from Kwikbyte in 06/2007 (http://lists.denx.de/pipermail/u-boot/2007-June/022068.html) Signed-off-by: Matthias Kaehlcke <matth...@kaehlcke.net> --- board/kb9202/Makefile | 1 + board/kb9202/nand.c | 151 ++++++++++++++++++++++++++ include/asm-arm/arch-at91rm9200/AT91RM9200.h | 2 + include/configs/kb9202.h | 10 ++- 4 files changed, 163 insertions(+), 1 deletions(-) create mode 100644 board/kb9202/nand.c diff --git a/board/kb9202/Makefile b/board/kb9202/Makefile index 363f665..d78454d 100644 --- a/board/kb9202/Makefile +++ b/board/kb9202/Makefile @@ -29,6 +29,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a COBJS := kb9202.o +COBJS-$(CONFIG_CMD_NAND) += nand.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/kb9202/nand.c b/board/kb9202/nand.c new file mode 100644 index 0000000..7db8d7c --- /dev/null +++ b/board/kb9202/nand.c @@ -0,0 +1,151 @@ +/* + * (C) Copyright 2006 + * KwikByte <kb9200_...@kwikbyte.com> + * + * (C) Copyright 2009 + * Matthias Kaehlcke <matth...@kaehlcke.net> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/AT91RM9200.h> +#include <asm/arch/hardware.h> + +#include <nand.h> + +/* + * hardware specific access to control-lines + */ + +#define MASK_ALE (1 << 22) /* our ALE is A22 */ +#define MASK_CLE (1 << 21) /* our CLE is A21 */ + +#define KB9202_NAND_NCE (1 << 28) /* EN* on D28 */ +#define KB9202_NAND_BUSY (1 << 29) /* RB* on D29 */ + +#define KB9202_SMC2_NWS (1 << 2) +#define KB9202_SMC2_TDF (1 << 8) +#define KB9202_SMC2_RWSETUP (1 << 24) +#define KB9202_SMC2_RWHOLD (1 << 29) + +/* + * Board-specific function to access device control signals + */ +static void kb9202_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + + if (ctrl & NAND_CTRL_CHANGE) { + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + + /* clear ALE and CLE bits */ + IO_ADDR_W &= ~(MASK_ALE | MASK_CLE); + + if (ctrl & NAND_CLE) + IO_ADDR_W |= MASK_CLE; + + if (ctrl & NAND_ALE) + IO_ADDR_W |= MASK_ALE; + + this->IO_ADDR_W = (void *) IO_ADDR_W; + + if (ctrl & NAND_NCE) + writel(KB9202_NAND_NCE, AT91C_PIOC_CODR); + else + writel(KB9202_NAND_NCE, AT91C_PIOC_SODR); + } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); +} + + +/* + * Board-specific function to access the device ready signal. + */ +static int kb9202_nand_ready(struct mtd_info *mtd) +{ + return readl(AT91C_PIOC_PDSR) & KB9202_NAND_BUSY; +} + + +/* + * Board-specific NAND init. Copied from include/linux/mtd/nand.h for reference. + * + * struct nand_chip - NAND Private Flash Chip Data + * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device + * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device + * @hwcontrol: [BOARDSPECIFIC] hardwarespecific function for accesing control-lines + * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line + * If set to NULL no access to ready/busy is available and the ready/busy information + * is read from the chip status register + * @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only + * be provided if a hardware ECC is available + * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines + * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR) + * @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about + * special functionality. See the defines for further explanation +*/ +/* + * This routine initializes controller and GPIOs. + */ +int board_nand_init(struct nand_chip *nand) +{ + unsigned int value; + + nand->ecc.mode = NAND_ECC_SOFT; + nand->options &= ~NAND_BUSWIDTH_16; + nand->cmd_ctrl = kb9202_nand_hwcontrol; + nand->dev_ready = kb9202_nand_ready; + + /* in case running outside of bootloader */ + writel(1 << AT91C_ID_PIOC, AT91C_PMC_PCER); + + /* setup nand flash access (allow ample margin) */ + /* 4 wait states, 1 setup, 1 hold, 1 float for 8-bit device */ + writel(AT91C_SMC2_WSEN | KB9202_SMC2_NWS | KB9202_SMC2_TDF | + AT91C_SMC2_DBW_8 | KB9202_SMC2_RWSETUP | KB9202_SMC2_RWHOLD, + AT91C_SMC_CSR3); + + /* enable internal NAND controller */ + value = readl(AT91C_EBI_CSA); + value |= AT91C_EBI_CS3A_SMC_SmartMedia; + writel(value, AT91C_EBI_CSA); + + /* enable SMOE/SMWE */ + writel(AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE, AT91C_PIOC_ASR); + writel(AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE, AT91C_PIOC_PDR); + writel(AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE, AT91C_PIOC_OER); + + /* set NCE to high */ + writel(KB9202_NAND_NCE, AT91C_PIOC_SODR); + + /* disable output on pin connected to the busy line of the NAND */ + writel(KB9202_NAND_BUSY, AT91C_PIOC_ODR); + + /* enable the PIO to control NCE and BUSY */ + writel(KB9202_NAND_NCE | KB9202_NAND_BUSY, AT91C_PIOC_PER); + + /* enable output for NCE */ + writel(KB9202_NAND_NCE, AT91C_PIOC_OER); + + return (0); +} diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h index 00bae1c..2e40565 100644 --- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h +++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h @@ -737,6 +737,7 @@ typedef struct _AT91S_PDC #define AT91C_SMC2_ACSS_STANDARD ((unsigned int) 0x0 << 16) /* (SMC2) Standard, asserted at the beginning of the access and deasserted at the end. */ #define AT91C_SMC2_DBW_8 ((unsigned int) 0x2 << 13) /* (SMC2) 8-bit. */ #define AT91C_SMC2_WSEN ((unsigned int) 0x1 << 7) /* (SMC2) Wait State Enable */ +#define AT91C_PIOC_OER ((AT91_REG *) 0xFFFFF810) /* (PIOC) PIO Output Enable Register */ #define AT91C_PIOC_ASR ((AT91_REG *) 0xFFFFF870) /* (PIOC) Select A Register */ #define AT91C_PIOC_SODR ((AT91_REG *) 0xFFFFF830) /* (PIOC) Set Output Data Register */ #define AT91C_PIOC_CODR ((AT91_REG *) 0xFFFFF834) /* (PIOC) Clear Output Data Register */ @@ -790,6 +791,7 @@ typedef struct _AT91S_PDC #define AT91C_MC_AASR 0xFFFFFF08 #define AT91C_EBI_CFGR 0xFFFFFF64 #define AT91C_SMC_CSR0 0xFFFFFF70 +#define AT91C_SMC_CSR3 0xFFFFFF7C /* clocks */ #define AT91C_PLLAR 0xFFFFFC28 diff --git a/include/configs/kb9202.h b/include/configs/kb9202.h index 8651e53..cd4c577 100644 --- a/include/configs/kb9202.h +++ b/include/configs/kb9202.h @@ -62,6 +62,11 @@ #ifdef CONFIG_KB9202B #define CONFIG_BOOTARGS "console=ttyS0,115200 noinitrd root=/dev/mtdblock0 rootfstype=jffs2 mem=64M" #define CONFIG_BOOTCOMMAND "bootm 0x10000000" +#define NAND_MAX_CHIPS 1 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_JFFS2_NAND +#define CONFIG_JFFS2_CMDLINE #endif @@ -71,7 +76,7 @@ /* * Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (128*1024) +#define CONFIG_SYS_MALLOC_LEN (1024*1024) #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ #define CONFIG_BAUDRATE 115200 @@ -112,6 +117,9 @@ #define CONFIG_CMD_EEPROM #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP +#ifdef CONFIG_KB9202B +#define CONFIG_CMD_NAND +#endif #define CONFIG_CMD_JFFS2 #undef CONFIG_CMD_BDI -- 1.6.3.1 -- Matthias Kaehlcke Embedded Linux Engineer Barcelona If liberty means anything at all, it means the right to tell people what they do not want to hear (George Orwell) .''`. using free software / Debian GNU/Linux | http://debian.org : :' : `. `'` gpg --keyserver pgp.mit.edu --recv-keys 47D8E5D4 `- _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot