hi,

El Fri, May 15, 2009 at 05:30:48PM -0500 Scott Wood ha dit:

> Matthias Kaehlcke wrote:
>> +/*
>> + * Board-specific function to access the device ready signal.
>> + */
>> +static int kb9202_nand_ready(struct mtd_info *mtd)
>> +{
>> +    return (((AT91C_BASE_PIOC->PIO_PDSR) & KB9202_NAND_BUSY) != 0);
>> +}
>
> Use I/O accessors.
>
>> +int board_nand_init(struct nand_chip *nand)
>> +{
>> +    unsigned        value;
> [snip]
>>> +   /* enable internal NAND controller */
>>> +   value = *(AT91C_EBI_CSA);
>>> +   value |= AT91C_EBI_CS3A_SMC_SmartMedia;
>>> +   *(AT91C_EBI_CSA) = value;
>
> This is a hardware register.  Surely it has a defined width?
>
>> +    /* setup nand flash access (allow ample margin) */
>> +    /* 4 wait states, 1 setup, 1 hold, 1 float for 8-bit device */
>> +    ((AT91PS_SMC2)AT91C_BASE_SMC2)->SMC2_CSR[3] =
>> +            AT91C_SMC2_WSEN |
>> +            (4 & AT91C_SMC2_NWS) |
>> +            ((1 << 8) & AT91C_SMC2_TDF) |
>> +            AT91C_SMC2_DBW_8 |
>> +            ((1 << 24) & AT91C_SMC2_RWSETUP) |
>> +            ((1 << 29) & AT91C_SMC2_RWHOLD);
>
> What is AT91PS_SMC2?  Please don't hide pointers inside typedefs. Please 
> define symbols to have the proper type in the first place, rather than 
> casting at the point of use.

here is a version of the patch that addresses the issues you pointed
out. sorry for the late response, my development system died and i
needed some time to get a new machine and restore the setup

--

This is a forward port of the patch submitted by Christian from
Kwikbyte in 06/2007
(http://lists.denx.de/pipermail/u-boot/2007-June/022068.html)

Signed-off-by: Matthias Kaehlcke <matth...@kaehlcke.net>
---
 board/kb9202/Makefile    |    2 +-
 board/kb9202/nand.c      |  153 ++++++++++++++++++++++++++++++++++++++++++++++
 include/configs/kb9202.h |   10 +++-
 3 files changed, 163 insertions(+), 2 deletions(-)
 create mode 100644 board/kb9202/nand.c

diff --git a/board/kb9202/Makefile b/board/kb9202/Makefile
index 363f665..0ba4fcc 100644
--- a/board/kb9202/Makefile
+++ b/board/kb9202/Makefile
@@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
 
 LIB    = $(obj)lib$(BOARD).a
 
-COBJS  := kb9202.o
+COBJS  := kb9202.o nand.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
diff --git a/board/kb9202/nand.c b/board/kb9202/nand.c
new file mode 100644
index 0000000..fa63aa1
--- /dev/null
+++ b/board/kb9202/nand.c
@@ -0,0 +1,153 @@
+/*
+ * (C) Copyright 2006 KwikByte kb9200_...@kwikbyte.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/AT91RM9200.h>
+#include <asm/arch/hardware.h>
+
+#ifdef CONFIG_CMD_NAND
+
+#include <nand.h>
+
+/*
+ *      hardware specific access to control-lines
+ */
+
+#define MASK_ALE        (1 << 22)       /* our ALE is A22 */
+#define MASK_CLE        (1 << 21)       /* our CLE is A21 */
+
+#define KB9202_NAND_NCE (1 << 28) /* EN* on D28 */
+#define KB9202_NAND_BUSY (1 << 29) /* RB* on D29 */
+
+/*
+ *     Board-specific function to access device control signals
+ */
+static void kb9202_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int 
ctrl)
+{
+       struct nand_chip *this = mtd->priv;
+
+       if (ctrl & NAND_CTRL_CHANGE) {
+               ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
+
+               /* clear ALE and CLE bits */
+               IO_ADDR_W &= ~(MASK_ALE | MASK_CLE);
+
+               if (ctrl & NAND_CLE)
+                       IO_ADDR_W |= MASK_CLE;
+
+               if (ctrl & NAND_ALE)
+                       IO_ADDR_W |= MASK_ALE;
+
+               this->IO_ADDR_W = (void *) IO_ADDR_W;
+
+               if (ctrl & NAND_NCE)
+                       AT91C_BASE_PIOC->PIO_CODR = KB9202_NAND_NCE;
+               else
+                       AT91C_BASE_PIOC->PIO_SODR = KB9202_NAND_NCE;
+       }
+
+       if (cmd != NAND_CMD_NONE)
+               writeb(cmd, this->IO_ADDR_W);
+}
+
+
+/*
+ * Board-specific function to access the device ready signal.
+ */
+static int kb9202_nand_ready(struct mtd_info *mtd)
+{
+       const unsigned int value = readl(AT91C_PIOC_PDSR);
+
+       return ((value & KB9202_NAND_BUSY) != 0);
+}
+
+
+/*
+ * Board-specific NAND init.  Copied from include/linux/mtd/nand.h for 
reference.
+ *
+ * struct nand_chip - NAND Private Flash Chip Data
+ * @IO_ADDR_R:         [BOARDSPECIFIC] address to read the 8 I/O lines of the 
flash device
+ * @IO_ADDR_W:         [BOARDSPECIFIC] address to write the 8 I/O lines of the 
flash device
+ * @hwcontrol:         [BOARDSPECIFIC] hardwarespecific function for accesing 
control-lines
+ * @dev_ready:         [BOARDSPECIFIC] hardwarespecific function for accesing 
device ready/busy line
+ *                     If set to NULL no access to ready/busy is available and 
the ready/busy information
+ *                     is read from the chip status register
+ * @enable_hwecc:      [BOARDSPECIFIC] function to enable (reset) hardware ecc 
generator. Must only
+ *                     be provided if a hardware ECC is available
+ * @eccmode:           [BOARDSPECIFIC] mode of ecc, see defines
+ * @chip_delay:                [BOARDSPECIFIC] chip dependent delay for 
transfering data from array to read regs (tR)
+ * @options:           [BOARDSPECIFIC] various chip options. They can partly 
be set to inform nand_scan about
+ *                     special functionality. See the defines for further 
explanation
+*/
+/*
+ * This routine initializes controller and GPIOs.
+ */
+int board_nand_init(struct nand_chip *nand)
+{
+       unsigned int value;
+       struct _AT91S_SMC2 *at91s_smc2 = AT91C_BASE_SMC2;
+
+       nand->ecc.mode = NAND_ECC_SOFT;
+       nand->options &= ~(NAND_BUSWIDTH_16);
+       nand->cmd_ctrl = kb9202_nand_hwcontrol;
+       nand->dev_ready = kb9202_nand_ready;
+
+       /* in case running outside of bootloader */
+       AT91C_BASE_PMC->PMC_PCER = ((unsigned) 1 << AT91C_ID_PIOC);
+
+       /* setup nand flash access (allow ample margin) */
+       /* 4 wait states, 1 setup, 1 hold, 1 float for 8-bit device */
+       at91s_smc2->SMC2_CSR[3] =
+               AT91C_SMC2_WSEN |
+               (4 & AT91C_SMC2_NWS) |
+               ((1 << 8) & AT91C_SMC2_TDF) |
+               AT91C_SMC2_DBW_8 |
+               ((1 << 24) & AT91C_SMC2_RWSETUP) |
+               ((1 << 29) & AT91C_SMC2_RWHOLD);
+
+       /* enable internal NAND controller */
+       value = *(AT91C_EBI_CSA);
+       value |= AT91C_EBI_CS3A_SMC_SmartMedia;
+       *(AT91C_EBI_CSA) = value;
+
+       /* enable SMOE/SMWE */
+       AT91C_BASE_PIOC->PIO_ASR = AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE;
+       AT91C_BASE_PIOC->PIO_PDR = AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE;
+       AT91C_BASE_PIOC->PIO_OER = AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE;
+
+       /* set NCE to high */
+       AT91C_BASE_PIOC->PIO_SODR = KB9202_NAND_NCE;
+
+       /* disable output on pin connected to the busy line of the NAND */
+       AT91C_BASE_PIOC->PIO_ODR = KB9202_NAND_BUSY;
+
+       /* enable the PIO to control NCE and BUSY */
+       AT91C_BASE_PIOC->PIO_PER = KB9202_NAND_NCE | KB9202_NAND_BUSY;
+
+       /* enable output for NCE */
+       AT91C_BASE_PIOC->PIO_OER = KB9202_NAND_NCE;
+
+       return (0);
+}
+
+#endif /* CONFIG_CMD_NAND */
diff --git a/include/configs/kb9202.h b/include/configs/kb9202.h
index 8651e53..cd4c577 100644
--- a/include/configs/kb9202.h
+++ b/include/configs/kb9202.h
@@ -62,6 +62,11 @@
 #ifdef CONFIG_KB9202B
 #define        CONFIG_BOOTARGS "console=ttyS0,115200 noinitrd 
root=/dev/mtdblock0 rootfstype=jffs2 mem=64M"
 #define        CONFIG_BOOTCOMMAND      "bootm 0x10000000"
+#define NAND_MAX_CHIPS 1
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE 0x40000000
+#define CONFIG_JFFS2_NAND
+#define CONFIG_JFFS2_CMDLINE
 #endif
 
 
@@ -71,7 +76,7 @@
 /*
  * Size of malloc() pool
  */
-#define CONFIG_SYS_MALLOC_LEN  (128*1024)
+#define CONFIG_SYS_MALLOC_LEN (1024*1024)
 #define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for 
initial data */
 
 #define CONFIG_BAUDRATE 115200
@@ -112,6 +117,9 @@
 #define CONFIG_CMD_EEPROM
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
+#ifdef CONFIG_KB9202B
+#define CONFIG_CMD_NAND
+#endif
 #define CONFIG_CMD_JFFS2
 
 #undef CONFIG_CMD_BDI
-- 
1.6.3.1

-- 
Matthias Kaehlcke
Embedded Linux Engineer
Barcelona

    Me lo contaron y lo olvidé, lo vi y lo entendí, lo hice y lo aprendí
                              (Confucio)
                                                                 .''`.
    using free software / Debian GNU/Linux | http://debian.org  : :'  :
                                                                `. `'`
gpg --keyserver pgp.mit.edu --recv-keys 47D8E5D4                  `-
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