Add STMP3780-based XFi3 board. This board is a small PMP device
sporting a CPU which was later rebranded to i.MX233 . Currently
supported is USB gadget mode and both external SD and internal
Phison SD-NAND bridge .
Signed-off-by: Marek Vasut <ma...@denx.de>
Cc: Fabio Estevam <fabio.este...@freescale.com>
Cc: Otavio Salvador <ota...@ossystems.com.br>
Cc: Stefano Babic <sba...@denx.de>
---
MAINTAINERS | 1 +
board/creative/xfi3/Makefile | 47 +++++++++
board/creative/xfi3/spl_boot.c | 150 +++++++++++++++++++++++++++
board/creative/xfi3/xfi3.c | 221 ++++++++++++++++++++++++++++++++++++++++
boards.cfg | 1 +
include/configs/xfi3.h | 82 +++++++++++++++
6 files changed, 502 insertions(+)
create mode 100644 board/creative/xfi3/Makefile
create mode 100644 board/creative/xfi3/spl_boot.c
create mode 100644 board/creative/xfi3/xfi3.c
create mode 100644 include/configs/xfi3.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 0a900dc..84c1f61 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -968,6 +968,7 @@ Marek Vasut <marek.va...@gmail.com>
vpac270 xscale/pxa
zipitz2 xscale/pxa
mx23_olinuxino i.MX23
+ xfi3 i.MX23
m28evk i.MX28
sc_sps_1 i.MX28
m53evk i.MX53
diff --git a/board/creative/xfi3/Makefile b/board/creative/xfi3/Makefile
new file mode 100644
index 0000000..c793bfb
--- /dev/null
+++ b/board/creative/xfi3/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+ifndef CONFIG_SPL_BUILD
+COBJS := xfi3.o
+else
+COBJS := spl_boot.o
+endif
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/creative/xfi3/spl_boot.c b/board/creative/xfi3/spl_boot.c
new file mode 100644
index 0000000..2d7cb4e
--- /dev/null
+++ b/board/creative/xfi3/spl_boot.c
@@ -0,0 +1,150 @@
+/*
+ * Creative ZEN X-Fi3 setup
+ *
+ * Copyright (C) 2013 Marek Vasut <ma...@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <config.h>
+#include <asm/io.h>
+#include <asm/arch/iomux-mx23.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/sys_proto.h>
+
+#define MUX_CONFIG_EMI (MXS_PAD_1V8 | MXS_PAD_12MA | MXS_PAD_PULLUP)
+#define MUX_CONFIG_SSP (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
+#define MUX_CONFIG_LCD (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
+
+const iomux_cfg_t iomux_setup[] = {
+ /* EMI */
+ MX23_PAD_EMI_D00__EMI_D00 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D01__EMI_D01 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D02__EMI_D02 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D03__EMI_D03 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D04__EMI_D04 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D05__EMI_D05 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D06__EMI_D06 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D07__EMI_D07 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D08__EMI_D08 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D09__EMI_D09 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D10__EMI_D10 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D11__EMI_D11 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D12__EMI_D12 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D13__EMI_D13 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D14__EMI_D14 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_D15__EMI_D15 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_CLKN__EMI_CLKN | MUX_CONFIG_EMI,
+
+ MX23_PAD_EMI_A00__EMI_A00 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_A01__EMI_A01 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_A02__EMI_A02 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_A03__EMI_A03 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_A04__EMI_A04 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_A05__EMI_A05 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_A06__EMI_A06 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_A07__EMI_A07 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_A08__EMI_A08 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_A09__EMI_A09 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_A10__EMI_A10 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_A11__EMI_A11 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_A12__EMI_A12 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
+
+ MX23_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
+ MX23_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
+
+ MX23_PAD_LCD_D00__LCD_D00 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D01__LCD_D01 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D02__LCD_D02 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D03__LCD_D03 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D04__LCD_D04 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D05__LCD_D05 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D06__LCD_D06 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D07__LCD_D07 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D08__LCD_D08 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D09__LCD_D09 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D10__LCD_D10 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D11__LCD_D11 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D12__LCD_D12 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D13__LCD_D13 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D14__LCD_D14 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D15__LCD_D15 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D16__LCD_D16 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_D17__LCD_D17 | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_RESET__LCD_RESET | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_RS__LCD_RS | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_WR__LCD_WR | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_CS__LCD_CS | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_ENABLE__LCD_ENABLE | MUX_CONFIG_LCD,
+ MX23_PAD_LCD_VSYNC__LCD_VSYNC | MUX_CONFIG_LCD,
+
+ MX23_PAD_SSP1_CMD__SSP1_CMD | MUX_CONFIG_SSP,
+ MX23_PAD_SSP1_DETECT__GPIO_2_1 | MUX_CONFIG_SSP,
+ MX23_PAD_SSP1_DATA0__SSP1_DATA0 | MUX_CONFIG_SSP,
+ MX23_PAD_SSP1_DATA1__SSP1_DATA1 | MUX_CONFIG_SSP,
+ MX23_PAD_SSP1_DATA2__SSP1_DATA2 | MUX_CONFIG_SSP,
+ MX23_PAD_SSP1_DATA3__SSP1_DATA3 | MUX_CONFIG_SSP,
+ MX23_PAD_SSP1_SCK__SSP1_SCK | MUX_CONFIG_SSP,
+ MX23_PAD_GPMI_D07__GPIO_0_7 | MUX_CONFIG_SSP,
+
+ MX23_PAD_GPMI_D00__SSP2_DATA0 | MUX_CONFIG_SSP,
+ MX23_PAD_GPMI_D01__SSP2_DATA1 | MUX_CONFIG_SSP,
+ MX23_PAD_GPMI_D02__SSP2_DATA2 | MUX_CONFIG_SSP,
+ MX23_PAD_GPMI_D03__SSP2_DATA3 | MUX_CONFIG_SSP,
+ MX23_PAD_GPMI_RDY1__SSP2_CMD | MUX_CONFIG_SSP,
+ MX23_PAD_GPMI_WRN__SSP2_SCK | MUX_CONFIG_SSP,
+
+ /* PWM -- FIXME */
+ MX23_PAD_PWM2__GPIO_1_28 | MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP,
+};
+
+void mxs_adjust_memory_params(uint32_t *dram_vals)
+{
+ /* mDDR configuration values */
+ const uint32_t regs[] = {
+ 0x01010001, 0x00010000, 0x01000000, 0x00000001,
+ 0x00010101, 0x00000001, 0x00010000, 0x01000001,
+ 0x01010000, 0x00000001, 0x07000200, 0x04070203,
+ 0x02020002, 0x06070a02, 0x0d000201, 0x0305000d,
+ 0x02080800, 0x19330f0a, 0x1f1f1c00, 0x020a1313,
+ 0x03061323, 0x0000000a, 0x00080008, 0x00200020,
+ 0x00200020, 0x00200020, 0x000003f7, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000020, 0x00000000,
+ 0x001023cd, 0x20410010, 0x00006665, 0x00000000,
+ 0x00000101, 0x00000001, 0x00000000, 0x00000000,
+ };
+ memcpy(dram_vals, regs, sizeof(regs));
+}
+
+void board_init_ll(void)
+{
+ mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+}
diff --git a/board/creative/xfi3/xfi3.c b/board/creative/xfi3/xfi3.c
new file mode 100644
index 0000000..8ab7746
--- /dev/null
+++ b/board/creative/xfi3/xfi3.c
@@ -0,0 +1,221 @@
+/*
+ * Creative ZEN X-Fi3 board
+ *
+ * Copyright (C) 2013 Marek Vasut <ma...@denx.de>
+ *
+ * Hardware investigation done by:
+ *
+ * Amaury Pouly <amaury.po...@gmail.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/iomux-mx23.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Functions
+ */
+int board_early_init_f(void)
+{
+ /* IO0 clock at 480MHz */
+ mxs_set_ioclk(MXC_IOCLK0, 480000);
+
+ /* SSP0 clock at 96MHz */
+ mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ return mxs_dram_init();
+}
+
+#ifdef CONFIG_CMD_MMC
+static int xfi3_mmc_cd(int id)
+{
+ switch (id) {
+ case 0:
+ /* The SSP_DETECT is inverted on this board. */
+ return gpio_get_value(MX23_PAD_SSP1_DETECT__GPIO_2_1);
+ case 1:
+ /* Phison bridge always present */
+ return 1;
+ default:
+ return 0;
+ }
+}
+
+int board_mmc_init(bd_t *bis)
+{
+ int ret;
+
+ /* MicroSD slot */
+ gpio_direction_input(MX23_PAD_SSP1_DETECT__GPIO_2_1);
+ gpio_direction_output(MX23_PAD_GPMI_D07__GPIO_0_7, 0);
+ ret = mxsmmc_initialize(bis, 0, NULL, xfi3_mmc_cd);
+ if (ret)
+ return ret;
+
+ /* Phison SD-NAND bridge */
+ ret = mxsmmc_initialize(bis, 1, NULL, xfi3_mmc_cd);
+
+ return ret;
+}
+#endif
+
+#ifdef CONFIG_VIDEO_MXS
+static int mxsfb_write_byte(uint32_t payload, const unsigned int data)
+{
+ struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
+ const unsigned int timeout = 0x10000;
+
+ if (mxs_wait_mask_clr(®s->hw_lcdif_ctrl_reg, LCDIF_CTRL_RUN,
+ timeout))
+ return -ETIMEDOUT;
+
+ writel((1 << LCDIF_TRANSFER_COUNT_V_COUNT_OFFSET) |
+ (1 << LCDIF_TRANSFER_COUNT_H_COUNT_OFFSET),
+ ®s->hw_lcdif_transfer_count);
+
+ writel(LCDIF_CTRL_DATA_SELECT | LCDIF_CTRL_RUN,
+ ®s->hw_lcdif_ctrl_clr);
+
+ if (data)
+ writel(LCDIF_CTRL_DATA_SELECT, ®s->hw_lcdif_ctrl_set);
+
+ writel(LCDIF_CTRL_RUN, ®s->hw_lcdif_ctrl_set);
+
+ if (mxs_wait_mask_clr(®s->hw_lcdif_lcdif_stat_reg, 1 << 29,
+ timeout))
+ return -ETIMEDOUT;
+
+ writel(payload, ®s->hw_lcdif_data);
+ return mxs_wait_mask_clr(®s->hw_lcdif_ctrl_reg, LCDIF_CTRL_RUN,
+ timeout);
+}
+
+static void mxsfb_write_register(uint32_t reg, uint32_t data)
+{
+ mxsfb_write_byte(reg, 0);
+ mxsfb_write_byte(data, 1);
+}
+
+void mxsfb_system_setup(void)
+{
+ struct mxs_lcdif_regs *regs = (struct mxs_lcdif_regs *)MXS_LCDIF_BASE;
+
+ /* Switch the LCDIF into System-Mode */
+ writel(LCDIF_CTRL_LCDIF_MASTER | LCDIF_CTRL_DOTCLK_MODE |
+ LCDIF_CTRL_BYPASS_COUNT, ®s->hw_lcdif_ctrl_clr);
+
+ /* Restart the SmartLCD controller */
+ mdelay(50);
+ writel(1, ®s->hw_lcdif_ctrl1_set);
+ mdelay(50);
+ writel(1, ®s->hw_lcdif_ctrl1_clr);
+ mdelay(50);
+ writel(1, ®s->hw_lcdif_ctrl1_set);
+ mdelay(50);
+
+ /* Program the SmartLCD controller */
+ writel(LCDIF_CTRL1_RECOVER_ON_UNDERFLOW, ®s->hw_lcdif_ctrl1_set);
+
+ writel(0x03030202, ®s->hw_lcdif_timing);
+
+ mxsfb_write_register(1, 0x01c);
+
+ mxsfb_write_register(2, 0x100);
+ /* 0x30 flips the LCD */
+ mxsfb_write_register(3, 0x1038);
+ mxsfb_write_register(8, 0x808);
+ /* This can possibly contain 0x111 */
+ mxsfb_write_register(0xc, 0x0);
+ mxsfb_write_register(0xf, 0xc01);
+ mxsfb_write_register(0x20, 0);
+ mxsfb_write_register(0x21, 0);
+ mdelay(30);
+ mxsfb_write_register(0x10, 0xa00);
+ mxsfb_write_register(0x11, 0x1038);
+ mdelay(30);
+ mxsfb_write_register(0x12, 0x1010);
+ mxsfb_write_register(0x13, 0x50);
+ mxsfb_write_register(0x14, 0x4f58);
+ mxsfb_write_register(0x30, 0);
+ mxsfb_write_register(0x31, 0xdb);
+ mxsfb_write_register(0x32, 0);
+ mxsfb_write_register(0x33, 0);
+ mxsfb_write_register(0x34, 0xdb);
+ mxsfb_write_register(0x35, 0);
+ mxsfb_write_register(0x36, 0xaf);
+ mxsfb_write_register(0x37, 0);
+ mxsfb_write_register(0x38, 0xdb);
+ mxsfb_write_register(0x39, 0);
+ mxsfb_write_register(0x50, 0);
+ mxsfb_write_register(0x51, 0x705);
+ mxsfb_write_register(0x52, 0xe0a);
+ mxsfb_write_register(0x53, 0x300);
+ mxsfb_write_register(0x54, 0xa0e);
+ mxsfb_write_register(0x55, 0x507);
+ mxsfb_write_register(0x56, 0);
+ mxsfb_write_register(0x57, 3);
+ mxsfb_write_register(0x58, 0x90a);
+ mxsfb_write_register(0x59, 0xa09);
+ mdelay(30);
+ mxsfb_write_register(7, 0x1017);
+ mdelay(40);
+ mxsfb_write_register(0x36, 0xaf);
+ mxsfb_write_register(0x37, 0);
+ mxsfb_write_register(0x38, 0xdb);
+ mxsfb_write_register(0x39, 0);
+ mxsfb_write_register(0x20, 0);
+ mxsfb_write_register(0x21, 0);
+ /* Turn on Framebuffer Upload Mode */
+ mxsfb_write_byte(0x22, 0);
+
+ writel(LCDIF_CTRL_LCDIF_MASTER | LCDIF_CTRL_DATA_SELECT,
+ ®s->hw_lcdif_ctrl_set);
+}
+#endif
+
+int board_init(void)
+{
+ /* Adress of boot parameters */
+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+ /* Turn on PWM backlight */
+ gpio_direction_output(MX23_PAD_PWM2__GPIO_1_28, 1);
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ usb_eth_initialize(bis);
+ return 0;
+}
diff --git a/boards.cfg b/boards.cfg
index f919c53..85e0c35 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -198,6 +198,7 @@ zmx25 arm arm926ejs zmx25
syteco
imx27lite arm arm926ejs imx27lite
logicpd mx27
magnesium arm arm926ejs imx27lite
logicpd mx27
mx23_olinuxino arm arm926ejs mx23_olinuxino
olimex mxs mx23_olinuxino
+xfi3 arm arm926ejs xfi3
creative mxs xfi3
apx4devkit arm arm926ejs apx4devkit
bluegiga mxs apx4devkit
mx23evk arm arm926ejs mx23evk
freescale mxs mx23evk
m28evk arm arm926ejs m28evk denx
mxs m28evk
diff --git a/include/configs/xfi3.h b/include/configs/xfi3.h
new file mode 100644
index 0000000..10facd9
--- /dev/null
+++ b/include/configs/xfi3.h
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2013 Marek Vasut <ma...@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __CONFIGS_XFI3_H__
+#define __CONFIGS_XFI3_H__
+
+/* System configurations */
+#define CONFIG_MX23 /* i.MX23 SoC */
+#define CONFIG_MACH_TYPE 0xffffffff
+
+/* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH
+#include <config_cmd_default.h>
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_GPIO
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
+#define CONFIG_VIDEO
+
+/* Memory configuration */
+#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
+#define PHYS_SDRAM_1 0x40000000 /* Base address */
+#define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+
+/* Environment */
+#define CONFIG_ENV_SIZE (16 * 1024)
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_OVERWRITE
+
+/* Booting Linux */
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTFILE "uImage"
+#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
+#define CONFIG_LOADADDR 0x42000000
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+
+/* LCD */
+#ifdef CONFIG_VIDEO
+#define CONFIG_VIDEO_MXS_MODE_SYSTEM
+#define CONFIG_SYS_BLACK_IN_WRITE
+#define LCD_BPP LCD_COLOR16
+#endif
+
+/* USB */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_EHCI_MXS_PORT0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+
+#define CONFIG_MV_UDC /* ChipIdea CI13xxx UDC */
+#define CONFIG_USB_GADGET_DUALSPEED
+
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETH_CDC
+#define CONFIG_NETCONSOLE
+#endif
+
+/* The rest of the configuration is shared */
+#include <configs/mxs.h>
+
+#endif /* __CONFIGS_XFI3_H__ */
--
1.7.10.4
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
