On 1/23/2013 1:48 AM, Stefano Babic wrote:
On 23/01/2013 00:48, Troy Kisky wrote:
On 11/10/2012 12:28 AM, Stefano Babic wrote:
I have also a general question : it seems to me that the interface for
PHY is set always to RMII - what about boards using MII ?
Best regards,
Stefano Babic
This was the patch I was thinking of....
On 4/19/2012 1:55 AM, Timo Ketola wrote:
Gasket needs a different configuration for 10BaseT than for higher
speeds.
Signed-off-by: Timo Ketola<t...@exertus.fi>
---
Changes in v4:
- Rewrapped commit message
Changes in v2:
- Dropped patches 2 and 3 so this one changed from 5 to 3
- Rebased to u-boot-imx next
- Removed the remove of 'miiphy_duplex' call
- Changed 'speed == _100BASET' to 'speed != _10BASET' to not to break
_1000BASET
- Changed configuration option to put gasket into RMII mode from
!CONFIG_MII to CONFIG_RMII. I'm not too sure how this should be
done though. !CONFIG_MII is normally used for this but its original
purpose was to enable MII *management* interface, I think...
drivers/net/fec_mxc.c | 43
++++++++++++++++++++++++-------------------
1 files changed, 24 insertions(+), 19 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 824a199..48a69d4 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -440,6 +440,22 @@ static int fec_open(struct eth_device *edev)
*/
writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN,
&fec->eth->ecntrl);
+#ifdef CONFIG_PHYLIB
+ if (!fec->phydev)
+ fec_eth_phy_config(edev);
+ if (fec->phydev) {
+ /* Start up the PHY */
+ phy_startup(fec->phydev);
+ speed = fec->phydev->speed;
+ } else {
+ speed = _100BASET;
+ }
+#else
+ miiphy_wait_aneg(edev);
+ speed = miiphy_speed(edev->name, fec->phy_id);
+ miiphy_duplex(edev->name, fec->phy_id);
+#endif
+
#if defined(CONFIG_MX25) || defined(CONFIG_MX53)
udelay(100);
/*
@@ -453,9 +469,14 @@ static int fec_open(struct eth_device *edev)
while (readw(&fec->eth->miigsk_enr)& MIIGSK_ENR_READY)
udelay(2);
-#if !defined(CONFIG_MII)
- /* configure gasket for RMII, 50 MHz, no loopback, and no echo */
- writew(MIIGSK_CFGR_IF_MODE_RMII,&fec->eth->miigsk_cfgr);
+#if defined(CONFIG_RMII)
+ if (speed != _10BASET)
+ /* configure gasket for RMII, 50MHz, no loopback, and no echo */
+ writew(MIIGSK_CFGR_IF_MODE_RMII,&fec->eth->miigsk_cfgr);
+ else
+ /* configure gasket for RMII, 5MHz, no loopback, and no echo */
+ writew(MIIGSK_CFGR_IF_MODE_RMII | MIIGSK_CFGR_FRCONT,
+ &fec->eth->miigsk_cfgr);
#else
/* configure gasket for MII, no loopback, and no echo */
writew(MIIGSK_CFGR_IF_MODE_MII,&fec->eth->miigsk_cfgr);
@@ -474,22 +495,6 @@ static int fec_open(struct eth_device *edev)
}
#endif
Can you fix 10BASET for non-reduced pin count boards as well?
Thanks
Troy
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