Added code to setup the extra Flash and FRAM chip selects
as used on the MIMC200 board.
Signed-off-by: Mark Jackson <[EMAIL PROTECTED]>
---
cpu/at32ap/cpu.c | 14 ++++++++++++++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/cpu/at32ap/cpu.c b/cpu/at32ap/cpu.c
index 1a13702..3902efe 100644
--- a/cpu/at32ap/cpu.c
+++ b/cpu/at32ap/cpu.c
@@ -56,6 +56,20 @@ int cpu_init(void)
hsmc3_writel(PULSE0, 0x0b0a0906);
hsmc3_writel(SETUP0, 0x00010002);
+#ifdef CONFIG_MIMC200
+ /* setup Data Flash chip select (NCS2) */
+ hsmc3_writel(MODE2, 0x20121003);
+ hsmc3_writel(CYCLE2, 0x000a0009);
+ hsmc3_writel(PULSE2, 0x0a060806);
+ hsmc3_writel(SETUP2, 0x00030102);
+
+ /* setup FRAM chip select (NCS3) */
+ hsmc3_writel(MODE3, 0x10120001);
+ hsmc3_writel(CYCLE3, 0x001e001d);
+ hsmc3_writel(PULSE3, 0x08040704);
+ hsmc3_writel(SETUP3, 0x02050204);
+#endif
+
clk_init();
/* Update the CPU speed according to the PLL configuration */
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